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[SOL] Remove LE byte swap and input buffers (llvm#75)
This PR addressed two more items in solana-labs/solana#34250. It removes the little endian byte swap instructions (solana-labs/rbpf#493) and the input buffers related instructions (solana-labs/rbpf#251).
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+24
-129
lines changed

7 files changed

+24
-129
lines changed

‎llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp

Lines changed: 24 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -44,12 +44,7 @@ class SBFDisassembler : public MCDisassembler {
4444
SBF_ALU64 = 0x7
4545
};
4646

47-
enum SBF_SIZE {
48-
SBF_W = 0x0,
49-
SBF_H = 0x1,
50-
SBF_B = 0x2,
51-
SBF_DW = 0x3
52-
};
47+
enum SBF_SIZE { SBF_W = 0x0, SBF_H = 0x1, SBF_B = 0x2, SBF_DW = 0x3 };
5348

5449
enum SBF_MODE {
5550
SBF_IMM = 0x0,
@@ -82,16 +77,15 @@ static MCDisassembler *createSBFDisassembler(const Target &T,
8277
return new SBFDisassembler(STI, Ctx);
8378
}
8479

85-
8680
extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSBFDisassembler() {
8781
// Register the disassembler.
8882
TargetRegistry::RegisterMCDisassembler(getTheSBFXTarget(),
8983
createSBFDisassembler);
9084
}
9185

9286
static const unsigned GPRDecoderTable[] = {
93-
SBF::R0, SBF::R1, SBF::R2, SBF::R3, SBF::R4, SBF::R5,
94-
SBF::R6, SBF::R7, SBF::R8, SBF::R9, SBF::R10, SBF::R11};
87+
SBF::R0, SBF::R1, SBF::R2, SBF::R3, SBF::R4, SBF::R5,
88+
SBF::R6, SBF::R7, SBF::R8, SBF::R9, SBF::R10, SBF::R11};
9589

9690
static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
9791
uint64_t /*Address*/,
@@ -105,8 +99,8 @@ static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
10599
}
106100

107101
static const unsigned GPR32DecoderTable[] = {
108-
SBF::W0, SBF::W1, SBF::W2, SBF::W3, SBF::W4, SBF::W5,
109-
SBF::W6, SBF::W7, SBF::W8, SBF::W9, SBF::W10, SBF::W11};
102+
SBF::W0, SBF::W1, SBF::W2, SBF::W3, SBF::W4, SBF::W5,
103+
SBF::W6, SBF::W7, SBF::W8, SBF::W9, SBF::W10, SBF::W11};
110104

111105
static DecodeStatus
112106
DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t /*Address*/,
@@ -146,12 +140,15 @@ static DecodeStatus readInstruction64(ArrayRef<uint8_t> Bytes, uint64_t Address,
146140

147141
Size = 8;
148142
if (IsLittleEndian) {
149-
Hi = (Bytes[0] << 24) | (Bytes[1] << 16) | (Bytes[2] << 0) | (Bytes[3] << 8);
150-
Lo = (Bytes[4] << 0) | (Bytes[5] << 8) | (Bytes[6] << 16) | (Bytes[7] << 24);
143+
Hi =
144+
(Bytes[0] << 24) | (Bytes[1] << 16) | (Bytes[2] << 0) | (Bytes[3] << 8);
145+
Lo =
146+
(Bytes[4] << 0) | (Bytes[5] << 8) | (Bytes[6] << 16) | (Bytes[7] << 24);
151147
} else {
152-
Hi = (Bytes[0] << 24) | ((Bytes[1] & 0x0F) << 20) | ((Bytes[1] & 0xF0) << 12) |
153-
(Bytes[2] << 8) | (Bytes[3] << 0);
154-
Lo = (Bytes[4] << 24) | (Bytes[5] << 16) | (Bytes[6] << 8) | (Bytes[7] << 0);
148+
Hi = (Bytes[0] << 24) | ((Bytes[1] & 0x0F) << 20) |
149+
((Bytes[1] & 0xF0) << 12) | (Bytes[2] << 8) | (Bytes[3] << 0);
150+
Lo =
151+
(Bytes[4] << 24) | (Bytes[5] << 16) | (Bytes[6] << 8) | (Bytes[7] << 0);
155152
}
156153
Insn = Make_64(Hi, Lo);
157154

@@ -167,7 +164,8 @@ DecodeStatus SBFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
167164
DecodeStatus Result;
168165

169166
Result = readInstruction64(Bytes, Address, Size, Insn, IsLittleEndian);
170-
if (Result == MCDisassembler::Fail) return MCDisassembler::Fail;
167+
if (Result == MCDisassembler::Fail)
168+
return MCDisassembler::Fail;
171169

172170
uint8_t InstClass = getInstClass(Insn);
173171
uint8_t InstMode = getInstMode(Insn);
@@ -178,10 +176,11 @@ DecodeStatus SBFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
178176
Result = decodeInstruction(DecoderTableSBFALU3264, Instr, Insn, Address,
179177
this, STI);
180178
else
181-
Result = decodeInstruction(DecoderTableSBF64, Instr, Insn, Address, this,
182-
STI);
179+
Result =
180+
decodeInstruction(DecoderTableSBF64, Instr, Insn, Address, this, STI);
183181

184-
if (Result == MCDisassembler::Fail) return MCDisassembler::Fail;
182+
if (Result == MCDisassembler::Fail)
183+
return MCDisassembler::Fail;
185184

186185
switch (Instr.getOpcode()) {
187186
case SBF::LD_imm64:
@@ -192,25 +191,15 @@ DecodeStatus SBFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
192191
}
193192
Size = 16;
194193
if (IsLittleEndian)
195-
Hi = (Bytes[12] << 0) | (Bytes[13] << 8) | (Bytes[14] << 16) | (Bytes[15] << 24);
194+
Hi = (Bytes[12] << 0) | (Bytes[13] << 8) | (Bytes[14] << 16) |
195+
(Bytes[15] << 24);
196196
else
197-
Hi = (Bytes[12] << 24) | (Bytes[13] << 16) | (Bytes[14] << 8) | (Bytes[15] << 0);
198-
auto& Op = Instr.getOperand(1);
197+
Hi = (Bytes[12] << 24) | (Bytes[13] << 16) | (Bytes[14] << 8) |
198+
(Bytes[15] << 0);
199+
auto &Op = Instr.getOperand(1);
199200
Op.setImm(Make_64(Hi, Op.getImm()));
200201
break;
201202
}
202-
case SBF::LD_ABS_B:
203-
case SBF::LD_ABS_H:
204-
case SBF::LD_ABS_W:
205-
case SBF::LD_IND_B:
206-
case SBF::LD_IND_H:
207-
case SBF::LD_IND_W: {
208-
auto Op = Instr.getOperand(0);
209-
Instr.clear();
210-
Instr.addOperand(MCOperand::createReg(SBF::R6));
211-
Instr.addOperand(Op);
212-
break;
213-
}
214203
}
215204

216205
return Result;

‎llvm/lib/Target/SBF/SBFInstrInfo.td

Lines changed: 0 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -896,48 +896,8 @@ let Constraints = "$dst = $src" in {
896896
def BE32 : BSWAP<32, "be32", SBF_TO_BE, [(set GPR:$dst, (srl (bswap GPR:$src), (i64 32)))]>;
897897
def BE64 : BSWAP<64, "be64", SBF_TO_BE, [(set GPR:$dst, (bswap GPR:$src))]>;
898898
}
899-
let Predicates = [SBFIsBigEndian] in {
900-
def LE16 : BSWAP<16, "le16", SBF_TO_LE, [(set GPR:$dst, (srl (bswap GPR:$src), (i64 48)))]>;
901-
def LE32 : BSWAP<32, "le32", SBF_TO_LE, [(set GPR:$dst, (srl (bswap GPR:$src), (i64 32)))]>;
902-
def LE64 : BSWAP<64, "le64", SBF_TO_LE, [(set GPR:$dst, (bswap GPR:$src))]>;
903-
}
904-
}
905-
906-
let Defs = [R0, R1, R2, R3, R4, R5], Uses = [R6], hasSideEffects = 1,
907-
hasExtraDefRegAllocReq = 1, hasExtraSrcRegAllocReq = 1, mayLoad = 1 in {
908-
class LOAD_ABS<SBFWidthModifer SizeOp, string Mnemonic, Intrinsic OpNode>
909-
: TYPE_LD_ST<SBF_ABS.Value, SizeOp.Value,
910-
(outs),
911-
(ins GPR:$skb, i64imm:$imm),
912-
Mnemonic # " $imm",
913-
[(set R0, (OpNode GPR:$skb, i64immSExt32:$imm))]> {
914-
bits<32> imm;
915-
916-
let Inst{31-0} = imm;
917-
let SBFClass = SBF_LD;
918899
}
919900

920-
class LOAD_IND<SBFWidthModifer SizeOp, string Mnemonic, Intrinsic OpNode>
921-
: TYPE_LD_ST<SBF_IND.Value, SizeOp.Value,
922-
(outs),
923-
(ins GPR:$skb, GPR:$val),
924-
Mnemonic # " $val",
925-
[(set R0, (OpNode GPR:$skb, GPR:$val))]> {
926-
bits<4> val;
927-
928-
let Inst{55-52} = val;
929-
let SBFClass = SBF_LD;
930-
}
931-
}
932-
933-
def LD_ABS_B : LOAD_ABS<SBF_B, "ldabsb", int_bpf_load_byte>;
934-
def LD_ABS_H : LOAD_ABS<SBF_H, "ldabsh", int_bpf_load_half>;
935-
def LD_ABS_W : LOAD_ABS<SBF_W, "ldabsw", int_bpf_load_word>;
936-
937-
def LD_IND_B : LOAD_IND<SBF_B, "ldindb", int_bpf_load_byte>;
938-
def LD_IND_H : LOAD_IND<SBF_H, "ldindh", int_bpf_load_half>;
939-
def LD_IND_W : LOAD_IND<SBF_W, "ldindw", int_bpf_load_word>;
940-
941901
let isCodeGenOnly = 1 in {
942902
def MOV_32_64 : ALU_RR<SBF_ALU, SBF_MOV,
943903
(outs GPR:$dst), (ins GPR32:$src),

‎llvm/test/CodeGen/SBF/ninline_asm.ll

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,6 @@ entry:
99
%0 = bitcast i32* %a to i8*
1010
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0) #2
1111
store i32 4, i32* %a, align 4
12-
tail call void asm sideeffect "ldabsh $0", "i"(i32 2) #2
13-
; CHECK: ldabsh 2
14-
tail call void asm sideeffect "ldindh $0", "r"(i32 4) #2
15-
; CHECK: ldindh r1
1612
%1 = tail call i32 asm sideeffect "mov64 $0, $1", "=r,i"(i32 4) #2
1713
; CHECK: mov64 r1, 4
1814
%2 = tail call i32 asm sideeffect "lddw $0, $1", "=r,i"(i64 333333333333) #2

‎llvm/test/MC/Disassembler/SBF/sbf-alu.txt

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -252,15 +252,9 @@
252252

253253

254254

255-
# CHECK-NEW: le16 r3
256-
# CHECK-NEW: le32 r4
257-
# CHECK-NEW: le64 r5
258255
# CHECK-NEW: be16 r0
259256
# CHECK-NEW: be32 r1
260257
# CHECK-NEW: be64 r2
261-
0xd4,0x03,0x00,0x00,0x10,0x00,0x00,0x00
262-
0xd4,0x04,0x00,0x00,0x20,0x00,0x00,0x00
263-
0xd4,0x05,0x00,0x00,0x40,0x00,0x00,0x00
264258
0xdc,0x00,0x00,0x00,0x10,0x00,0x00,0x00
265259
0xdc,0x01,0x00,0x00,0x20,0x00,0x00,0x00
266260
0xdc,0x02,0x00,0x00,0x40,0x00,0x00,0x00

‎llvm/test/MC/Disassembler/SBF/sbf-ldst.txt

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -130,17 +130,3 @@
130130
0xc3,0x58,0xf0,0xff,0xf1,0x00,0x00,0x00
131131

132132

133-
134-
# Obsolete ldabs/ldind for completeness.
135-
# CHECK-NEW: ldabsb 64
136-
# CHECK-NEW: ldabsh 128
137-
# CHECK-NEW: ldabsw 0
138-
# CHECK-NEW: ldindb r5
139-
# CHECK-NEW: ldindh r9
140-
# CHECK-NEW: ldindw r7
141-
0x30,0x00,0x00,0x00,0x40,0x00,0x00,0x00
142-
0x28,0x00,0x00,0x00,0x80,0x00,0x00,0x00
143-
0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00
144-
0x50,0x50,0x00,0x00,0x00,0x00,0x00,0x00
145-
0x48,0x90,0x00,0x00,0x00,0x00,0x00,0x00
146-
0x40,0x70,0x00,0x00,0x00,0x00,0x00,0x00

‎llvm/test/MC/SBF/sbf-alu.s

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -330,21 +330,12 @@ mov32 w5, -123
330330

331331

332332

333-
# CHECK-OBJ-NEW: le16 r3
334-
# CHECK-OBJ-NEW: le32 r4
335-
# CHECK-OBJ-NEW: le64 r5
336333
# CHECK-OBJ-NEW: be16 r0
337334
# CHECK-OBJ-NEW: be32 r1
338335
# CHECK-OBJ-NEW: be64 r2
339-
# CHECK-ASM-NEW: encoding: [0xd4,0x03,0x00,0x00,0x10,0x00,0x00,0x00]
340-
# CHECK-ASM-NEW: encoding: [0xd4,0x04,0x00,0x00,0x20,0x00,0x00,0x00]
341-
# CHECK-ASM-NEW: encoding: [0xd4,0x05,0x00,0x00,0x40,0x00,0x00,0x00]
342336
# CHECK-ASM-NEW: encoding: [0xdc,0x00,0x00,0x00,0x10,0x00,0x00,0x00]
343337
# CHECK-ASM-NEW: encoding: [0xdc,0x01,0x00,0x00,0x20,0x00,0x00,0x00]
344338
# CHECK-ASM-NEW: encoding: [0xdc,0x02,0x00,0x00,0x40,0x00,0x00,0x00]
345-
le16 r3
346-
le32 r4
347-
le64 r5
348339
be16 r0
349340
be32 r1
350341
be64 r2

‎llvm/test/MC/SBF/sbf-ldst.s

Lines changed: 0 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -183,24 +183,3 @@ stxxchgw [r8 - 16], w0
183183
stxcmpxchgdw [r8 - 16], r5
184184
stxcmpxchgw [r8 - 16], w5
185185

186-
187-
188-
# Obsolete ldabs/ldind for completeness.
189-
# CHECK-OBJ-NEW: ldabsb 0x40
190-
# CHECK-OBJ-NEW: ldabsh 0x80
191-
# CHECK-OBJ-NEW: ldabsw 0
192-
# CHECK-OBJ-NEW: ldindb r5
193-
# CHECK-OBJ-NEW: ldindh r9
194-
# CHECK-OBJ-NEW: ldindw r7
195-
# CHECK-ASM-NEW: encoding: [0x30,0x00,0x00,0x00,0x40,0x00,0x00,0x00]
196-
# CHECK-ASM-NEW: encoding: [0x28,0x00,0x00,0x00,0x80,0x00,0x00,0x00]
197-
# CHECK-ASM-NEW: encoding: [0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
198-
# CHECK-ASM-NEW: encoding: [0x50,0x50,0x00,0x00,0x00,0x00,0x00,0x00]
199-
# CHECK-ASM-NEW: encoding: [0x48,0x90,0x00,0x00,0x00,0x00,0x00,0x00]
200-
# CHECK-ASM-NEW: encoding: [0x40,0x70,0x00,0x00,0x00,0x00,0x00,0x00]
201-
ldabsb 64
202-
ldabsh 128
203-
ldabsw 0
204-
ldindb r5
205-
ldindh r9
206-
ldindw r7

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