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65 | 65 | #include "llvm/Transforms/IPO/GlobalDCE.h"
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66 | 66 | #include "llvm/Transforms/IPO/Internalize.h"
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67 | 67 | #include "llvm/Transforms/Scalar.h"
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| 68 | +#include "llvm/Transforms/Scalar/EarlyCSE.h" |
68 | 69 | #include "llvm/Transforms/Scalar/FlattenCFG.h"
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69 | 70 | #include "llvm/Transforms/Scalar/GVN.h"
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70 | 71 | #include "llvm/Transforms/Scalar/InferAddressSpaces.h"
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| 72 | +#include "llvm/Transforms/Scalar/LICM.h" |
| 73 | +#include "llvm/Transforms/Scalar/LoopDataPrefetch.h" |
| 74 | +#include "llvm/Transforms/Scalar/NaryReassociate.h" |
| 75 | +#include "llvm/Transforms/Scalar/SeparateConstOffsetFromGEP.h" |
71 | 76 | #include "llvm/Transforms/Scalar/Sink.h"
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| 77 | +#include "llvm/Transforms/Scalar/StraightLineStrengthReduce.h" |
72 | 78 | #include "llvm/Transforms/Scalar/StructurizeCFG.h"
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73 | 79 | #include "llvm/Transforms/Utils.h"
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74 | 80 |
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@@ -1772,6 +1778,70 @@ AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
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1772 | 1778 | ShadowStackGCLoweringPass>();
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1773 | 1779 | }
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1774 | 1780 |
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| 1781 | +void AMDGPUCodeGenPassBuilder::addIRPasses(AddIRPass &addPass) const { |
| 1782 | + // TODO: Missing AMDGPURemoveIncompatibleFunctions |
| 1783 | + |
| 1784 | + addPass(AMDGPUPrintfRuntimeBindingPass()); |
| 1785 | + if (LowerCtorDtor) |
| 1786 | + addPass(AMDGPUCtorDtorLoweringPass()); |
| 1787 | + |
| 1788 | + if (isPassEnabled(EnableImageIntrinsicOptimizer)) |
| 1789 | + addPass(AMDGPUImageIntrinsicOptimizerPass(TM)); |
| 1790 | + |
| 1791 | + // This can be disabled by passing ::Disable here or on the command line |
| 1792 | + // with --expand-variadics-override=disable. |
| 1793 | + addPass(ExpandVariadicsPass(ExpandVariadicsMode::Lowering)); |
| 1794 | + |
| 1795 | + addPass(AMDGPUAlwaysInlinePass()); |
| 1796 | + addPass(AlwaysInlinerPass()); |
| 1797 | + |
| 1798 | + // TODO: Missing OpenCLEnqueuedBlockLowering |
| 1799 | + |
| 1800 | + // Runs before PromoteAlloca so the latter can account for function uses |
| 1801 | + if (EnableLowerModuleLDS) |
| 1802 | + addPass(AMDGPULowerModuleLDSPass(TM)); |
| 1803 | + |
| 1804 | + if (TM.getOptLevel() > CodeGenOptLevel::None) |
| 1805 | + addPass(InferAddressSpacesPass()); |
| 1806 | + |
| 1807 | + // Run atomic optimizer before Atomic Expand |
| 1808 | + if (TM.getOptLevel() >= CodeGenOptLevel::Less && |
| 1809 | + (AMDGPUAtomicOptimizerStrategy != ScanOptions::None)) |
| 1810 | + addPass(AMDGPUAtomicOptimizerPass(TM, AMDGPUAtomicOptimizerStrategy)); |
| 1811 | + |
| 1812 | + addPass(AtomicExpandPass()); |
| 1813 | + |
| 1814 | + if (TM.getOptLevel() > CodeGenOptLevel::None) { |
| 1815 | + addPass(AMDGPUPromoteAllocaPass(TM)); |
| 1816 | + if (isPassEnabled(EnableScalarIRPasses)) |
| 1817 | + addStraightLineScalarOptimizationPasses(addPass); |
| 1818 | + |
| 1819 | + // TODO: Handle EnableAMDGPUAliasAnalysis |
| 1820 | + |
| 1821 | + // TODO: May want to move later or split into an early and late one. |
| 1822 | + addPass(AMDGPUCodeGenPreparePass(TM)); |
| 1823 | + |
| 1824 | + // TODO: LICM |
| 1825 | + } |
| 1826 | + |
| 1827 | + Base::addIRPasses(addPass); |
| 1828 | + |
| 1829 | + // EarlyCSE is not always strong enough to clean up what LSR produces. For |
| 1830 | + // example, GVN can combine |
| 1831 | + // |
| 1832 | + // %0 = add %a, %b |
| 1833 | + // %1 = add %b, %a |
| 1834 | + // |
| 1835 | + // and |
| 1836 | + // |
| 1837 | + // %0 = shl nsw %a, 2 |
| 1838 | + // %1 = shl %a, 2 |
| 1839 | + // |
| 1840 | + // but EarlyCSE can do neither of them. |
| 1841 | + if (isPassEnabled(EnableScalarIRPasses)) |
| 1842 | + addEarlyCSEOrGVNPass(addPass); |
| 1843 | +} |
| 1844 | + |
1775 | 1845 | void AMDGPUCodeGenPassBuilder::addCodeGenPrepare(AddIRPass &addPass) const {
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1776 | 1846 | // AMDGPUAnnotateKernelFeaturesPass is missing here, but it will hopefully be
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1777 | 1847 | // deleted soon.
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