Skip to content

Incorrect AVR signal/interrupt handlers are not rejected #115641

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
workingjubilee opened this issue Nov 10, 2024 · 3 comments
Open

Incorrect AVR signal/interrupt handlers are not rejected #115641

workingjubilee opened this issue Nov 10, 2024 · 3 comments
Assignees

Comments

@workingjubilee
Copy link
Contributor

...uhhh this compiles and I'm pretty sure it shouldn't. Honestly, I can't tell you exactly why it's incorrect. I don't know much about the semantics of AVR's interrupt handlers. But I've looked at the way this code is handled for most backends, and it seems likely LLVM should be rejecting at least one of:

  • direct calls to these interrupt handlers
  • trying to compile 36 arguments for an interrupt handler
  • trying to return something from an interrupt handler

Godbolt.

source_filename = "example.925e6eb0586113f0-cgu.0"
target datalayout = "e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8"
target triple = "avr-unknown-unknown"

define dso_local void @"_ZN36_$LT$u64$u20$as$u20$example..Add$GT$3add17hafda95d2b4998a07E"(ptr sret([8 x i8]) align 1 %_0, i64 %self, i64 %rhs) unnamed_addr addrspace(1) #0 {
  %1 = add i64 %self, %rhs
  store i64 %1, ptr %_0, align 1
  ret void
}

define dso_local avr_signalcc  i64 @_ZN7example13avr_interrupt17h3c49fc10f8860300E(i8 %_a, i8 %_b, i8 %_c, i8 %_d, i8 %_e, i8 %_f, i8 %_g, i8 %_h, i8 %_i, i8 %_j, i8 %_k, i8 %_l, i8 %_m, i8 %_n, i8 %_o, i8 %_p, i8 %_q, i8 %_r, i8 %_s, i8 %_t, i8 %_u, i8 %_v, i8 %_w, i8 %_x, i8 %_y, i8 %_z, i8 %_0, i8 %_1, i8 %_2, i8 %_3, i8 %_4, i8 %_5, i8 %_6, i8 %_7, i8 %_8, i8 %_9) unnamed_addr addrspace(1) #1 {
  %_71 = zext i8 %_a to i64
  %_72 = zext i8 %_b to i64
  %_70 = add i64 %_71, %_72
  %_73 = zext i8 %_c to i64
  %_69 = add i64 %_70, %_73
  %_74 = zext i8 %_d to i64
  %_68 = add i64 %_69, %_74
  %_75 = zext i8 %_e to i64
  %_67 = add i64 %_68, %_75
  %_76 = zext i8 %_f to i64
  %_66 = add i64 %_67, %_76
  %_77 = zext i8 %_g to i64
  %_65 = add i64 %_66, %_77
  %_78 = zext i8 %_h to i64
  %_64 = add i64 %_65, %_78
  %_79 = zext i8 %_i to i64
  %_63 = add i64 %_64, %_79
  %_80 = zext i8 %_j to i64
  %_62 = add i64 %_63, %_80
  %_81 = zext i8 %_k to i64
  %_61 = add i64 %_62, %_81
  %_82 = zext i8 %_l to i64
  %_60 = add i64 %_61, %_82
  %_83 = zext i8 %_m to i64
  %_59 = add i64 %_60, %_83
  %_84 = zext i8 %_n to i64
  %_58 = add i64 %_59, %_84
  %_85 = zext i8 %_o to i64
  %_57 = add i64 %_58, %_85
  %_86 = zext i8 %_p to i64
  %_56 = add i64 %_57, %_86
  %_87 = zext i8 %_q to i64
  %_55 = add i64 %_56, %_87
  %_88 = zext i8 %_r to i64
  %_54 = add i64 %_55, %_88
  %_89 = zext i8 %_s to i64
  %_53 = add i64 %_54, %_89
  %_90 = zext i8 %_t to i64
  %_52 = add i64 %_53, %_90
  %_91 = zext i8 %_u to i64
  %_51 = add i64 %_52, %_91
  %_92 = zext i8 %_v to i64
  %_50 = add i64 %_51, %_92
  %_93 = zext i8 %_w to i64
  %_49 = add i64 %_50, %_93
  %_94 = zext i8 %_x to i64
  %_48 = add i64 %_49, %_94
  %_95 = zext i8 %_y to i64
  %_47 = add i64 %_48, %_95
  %_96 = zext i8 %_z to i64
  %_46 = add i64 %_47, %_96
  %_97 = zext i8 %_0 to i64
  %_45 = add i64 %_46, %_97
  %_98 = zext i8 %_1 to i64
  %_44 = add i64 %_45, %_98
  %_99 = zext i8 %_2 to i64
  %_43 = add i64 %_44, %_99
  %_100 = zext i8 %_3 to i64
  %_42 = add i64 %_43, %_100
  %_101 = zext i8 %_4 to i64
  %_41 = add i64 %_42, %_101
  %_102 = zext i8 %_5 to i64
  %_40 = add i64 %_41, %_102
  %_103 = zext i8 %_6 to i64
  %_39 = add i64 %_40, %_103
  %_104 = zext i8 %_7 to i64
  %_38 = add i64 %_39, %_104
  %_105 = zext i8 %_8 to i64
  %_37 = add i64 %_38, %_105
  %_106 = zext i8 %_9 to i64
  %_01 = add i64 %_37, %_106
  ret i64 %_01
}

define dso_local avr_intrcc  i64 @_ZN7example16avr_nb_interrupt17h637e1fa54320dfe7E(i8 %_a, i8 %_b, i8 %_c, i8 %_d, i8 %_e, i8 %_f, i8 %_g, i8 %_h, i8 %_i, i8 %_j, i8 %_k, i8 %_l, i8 %_m, i8 %_n, i8 %_o, i8 %_p, i8 %_q, i8 %_r, i8 %_s, i8 %_t, i8 %_u, i8 %_v, i8 %_w, i8 %_x, i8 %_y, i8 %_z, i8 %_0, i8 %_1, i8 %_2, i8 %_3, i8 %_4, i8 %_5, i8 %_6, i8 %_7, i8 %_8, i8 %_9) unnamed_addr addrspace(1) #1 {
  %_71 = zext i8 %_a to i64
  %_72 = zext i8 %_b to i64
  %_70 = add i64 %_71, %_72
  %_73 = zext i8 %_c to i64
  %_69 = add i64 %_70, %_73
  %_74 = zext i8 %_d to i64
  %_68 = add i64 %_69, %_74
  %_75 = zext i8 %_e to i64
  %_67 = add i64 %_68, %_75
  %_76 = zext i8 %_f to i64
  %_66 = add i64 %_67, %_76
  %_77 = zext i8 %_g to i64
  %_65 = add i64 %_66, %_77
  %_78 = zext i8 %_h to i64
  %_64 = add i64 %_65, %_78
  %_79 = zext i8 %_i to i64
  %_63 = add i64 %_64, %_79
  %_80 = zext i8 %_j to i64
  %_62 = add i64 %_63, %_80
  %_81 = zext i8 %_k to i64
  %_61 = add i64 %_62, %_81
  %_82 = zext i8 %_l to i64
  %_60 = add i64 %_61, %_82
  %_83 = zext i8 %_m to i64
  %_59 = add i64 %_60, %_83
  %_84 = zext i8 %_n to i64
  %_58 = add i64 %_59, %_84
  %_85 = zext i8 %_o to i64
  %_57 = add i64 %_58, %_85
  %_86 = zext i8 %_p to i64
  %_56 = add i64 %_57, %_86
  %_87 = zext i8 %_q to i64
  %_55 = add i64 %_56, %_87
  %_88 = zext i8 %_r to i64
  %_54 = add i64 %_55, %_88
  %_89 = zext i8 %_s to i64
  %_53 = add i64 %_54, %_89
  %_90 = zext i8 %_t to i64
  %_52 = add i64 %_53, %_90
  %_91 = zext i8 %_u to i64
  %_51 = add i64 %_52, %_91
  %_92 = zext i8 %_v to i64
  %_50 = add i64 %_51, %_92
  %_93 = zext i8 %_w to i64
  %_49 = add i64 %_50, %_93
  %_94 = zext i8 %_x to i64
  %_48 = add i64 %_49, %_94
  %_95 = zext i8 %_y to i64
  %_47 = add i64 %_48, %_95
  %_96 = zext i8 %_z to i64
  %_46 = add i64 %_47, %_96
  %_97 = zext i8 %_0 to i64
  %_45 = add i64 %_46, %_97
  %_98 = zext i8 %_1 to i64
  %_44 = add i64 %_45, %_98
  %_99 = zext i8 %_2 to i64
  %_43 = add i64 %_44, %_99
  %_100 = zext i8 %_3 to i64
  %_42 = add i64 %_43, %_100
  %_101 = zext i8 %_4 to i64
  %_41 = add i64 %_42, %_101
  %_102 = zext i8 %_5 to i64
  %_40 = add i64 %_41, %_102
  %_103 = zext i8 %_6 to i64
  %_39 = add i64 %_40, %_103
  %_104 = zext i8 %_7 to i64
  %_38 = add i64 %_39, %_104
  %_105 = zext i8 %_8 to i64
  %_37 = add i64 %_38, %_105
  %_106 = zext i8 %_9 to i64
  %_01 = add i64 %_37, %_106
  ret i64 %_01
}

define dso_local void @_ZN7example4call17h55454176dd4a1501E() unnamed_addr addrspace(1) #0 {
  %_1 = call avr_signalcc  addrspace(1) i64 @_ZN7example13avr_interrupt17h3c49fc10f8860300E(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 32, i8 33, i8 34, i8 35, i8 36) #2
  %_2 = call avr_intrcc  addrspace(1) i64 @_ZN7example16avr_nb_interrupt17h637e1fa54320dfe7E(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31, i8 32, i8 33, i8 34, i8 35, i8 36) #2
  ret void
}

attributes #0 = { uwtable "target-cpu"="atmega328" }
attributes #1 = { nounwind uwtable "target-cpu"="atmega328" }
attributes #2 = { nounwind }

!llvm.ident = !{!0}

!0 = !{!"rustc version 1.84.0-nightly (b91a3a056 2024-11-07)"}
@workingjubilee
Copy link
Contributor Author

I have been informed by @Patryk27 that the latter two are indeed requirements: they should accept nothing and return void.

@benshi001 benshi001 self-assigned this Dec 5, 2024
@benshi001
Copy link
Member

benshi001 commented Jan 21, 2025

according to https://godbolt.org/z/3K93T7PWM,

functions with signal or interrupt attribute can neither have arguments nor return a value.

We should make changes to llvm-project/clang/lib/Sema/SemaAVR.cpp to emit an error.

@benshi001
Copy link
Member

benshi001 commented Jan 27, 2025

also, interrupt/signal handlers can not be called by other ordinary functions.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

No branches or pull requests

3 participants