[SPI_Host] SPI Top level test - FPGA

[johngt]

estimate 24
Corresponds to SH:1 on internal tracking

[johngt]

@GregAC / @andreaskurth - wondering if you could help scope this out and detail a little bit more of what is needed to help @hcallahan-lowrisc commence this work. TIA

[andreaskurth]

In my understanding, this builds on #15072 to write a TLT in which Ibex uses the spi_host DIF to configure first spi_host and then the flash chip, followed by writes and reads. The configurations should be representative of what we'll be using in a real use case, and the addresses and data to write and read should be partially randomly patterned and partially directed (again to represent a real use case).

Work on this -- especially on the test SW -- can start while spi_agent is emulating an SPI device in the top-level tests, but for the bulk of this test, a functional model of the target flash chip is required.

[johngt]

Moving this effort to M3 given that the Winbond BFM integration task has moved post M2.

[tjaychen]

@johngt can you remind me... since we agreed late last year that WindBond BFM integration would likely not happen any time soon, I think we said we would move such testing to to FPGA land where someone from @arunthomas could potentially help.

Is that right? If yes, I think we can boot this issue to backlog. I'll drop the priority to P4 for now, but let me know if you disagree.

[johngt]

I missed this when I sent my other message on the other comms channel. I was not quite sure if Winbond BFM would be coming back any time soon. The main thing is if we are going to want to test this on the Engineering Samples. If the answer is yes then I think we would need to put the priority at P3, and create an associated task to see what we are going to do with having any model for testing at P1. If this is only going to be for production Silicon then we can keep the priority at P4 and move to testing in the FPGA realm.
I think the decision will come back to if we need this for ES and if so prioritise accordingly. I can't answer that question so will tag @moidx. May be best to discuss this in the M3 coordination channel, where it has sufficient visibility.

[andreaskurth]

Triaged for spi_host. This is about adding a top-level test in which spi_host interfaces a flash chip, either as BFM in simulation or as physical peripheral connected to the FPGA board. I'm thus assigning this to M2.5 with Priority:P1 Priority: high since AFAIK this is an important functionality that is not covered by other tests so far.

[andreaskurth]

Note that this is a prerequisite for #14158.

[moidx]

@johngt repurposing this issue to cover FPGA testing.

[a-will]

In case it helps with estimation, #17621 looks to take spi_host_smoketest further on the FPGA.

[johngt]

@engdoreis / @hcallahan-lowrisc - using this open source issue for tracking the SPI efforts w/ FPGA.

Broadly speaking this covers Hyperdebug, Breakout Boards (BoBs) and related items. Essentially all of the activities captured in closed source - https://github.com/orgs/lowRISC/projects/36

[msfschaffner]

Noting here that the intent is to only perform FPGA integration testing on spi_host0 that is attached to dedicated pads for now.

There is currently no plan to test the muxed spi_host1 for M2.5.2.

CC @moidx

[GregAC]

@engdoreis could you provide an update on this?

[engdoreis]

Regarding the FPGA test with real flashes:

• We currently have two tests (spi_host_smoketest and spi_host_winbond_flash_test) for the spi_host0 running on CI against a Winbond part which is embedded in the CW310 board.
• I'm planing for the next week to get one test for each of the flashes in the BoB running on a nightly job (initial PR) connected to the spi_host_1.

Unfortunately, I don't have updates about the simulation test mentioned above.

[johngt]

@hcallahan-lowrisc - FYI as part of V2.5 sign-offs.
@engdoreis can you coordinate with @hcallahan-lowrisc and let him know when this can be closed out to complete the Sign-off. TIA

[moidx]

Moving to M2.5.3 as spi_host was marked as signed off for V2.5.

[engdoreis]

@johngt I think we can close this issue. We have now 4 different flash devices tested on the nightly job.