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logic-synthesis

Here are 2 public repositories matching this topic...

workcraft / workcraft

Toolset to capture, simulate, synthesize and verify graph models

fsm async simulation eda cad petri-nets circuit formal-verification logic-synthesis stg formal-specification

Updated May 2, 2025
Java

raescartin / Recompiler

An approach to algorithm optimization through circuit minimization techniques.

optimization minimization logic-synthesis compilation

Updated Apr 10, 2017
Java

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