|
32 | 32 | * IRO[142].m2) + ((sbId) * IRO[142].m3))
|
33 | 33 | #define CSTORM_IGU_MODE_OFFSET (IRO[161].base)
|
34 | 34 | #define CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) \
|
35 |
| - (IRO[323].base + ((pfId) * IRO[323].m1)) |
36 |
| -#define CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \ |
37 | 35 | (IRO[324].base + ((pfId) * IRO[324].m1))
|
| 36 | +#define CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \ |
| 37 | + (IRO[325].base + ((pfId) * IRO[325].m1)) |
38 | 38 | #define CSTORM_ISCSI_EQ_CONS_OFFSET(pfId, iscsiEqId) \
|
39 |
| - (IRO[316].base + ((pfId) * IRO[316].m1) + ((iscsiEqId) * IRO[316].m2)) |
| 39 | + (IRO[317].base + ((pfId) * IRO[317].m1) + ((iscsiEqId) * IRO[317].m2)) |
40 | 40 | #define CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId, iscsiEqId) \
|
41 |
| - (IRO[318].base + ((pfId) * IRO[318].m1) + ((iscsiEqId) * IRO[318].m2)) |
| 41 | + (IRO[319].base + ((pfId) * IRO[319].m1) + ((iscsiEqId) * IRO[319].m2)) |
42 | 42 | #define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId, iscsiEqId) \
|
43 |
| - (IRO[317].base + ((pfId) * IRO[317].m1) + ((iscsiEqId) * IRO[317].m2)) |
| 43 | + (IRO[318].base + ((pfId) * IRO[318].m1) + ((iscsiEqId) * IRO[318].m2)) |
44 | 44 | #define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId, iscsiEqId) \
|
45 |
| - (IRO[319].base + ((pfId) * IRO[319].m1) + ((iscsiEqId) * IRO[319].m2)) |
| 45 | + (IRO[320].base + ((pfId) * IRO[320].m1) + ((iscsiEqId) * IRO[320].m2)) |
46 | 46 | #define CSTORM_ISCSI_EQ_PROD_OFFSET(pfId, iscsiEqId) \
|
47 |
| - (IRO[315].base + ((pfId) * IRO[315].m1) + ((iscsiEqId) * IRO[315].m2)) |
| 47 | + (IRO[316].base + ((pfId) * IRO[316].m1) + ((iscsiEqId) * IRO[316].m2)) |
48 | 48 | #define CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId, iscsiEqId) \
|
49 |
| - (IRO[321].base + ((pfId) * IRO[321].m1) + ((iscsiEqId) * IRO[321].m2)) |
| 49 | + (IRO[322].base + ((pfId) * IRO[322].m1) + ((iscsiEqId) * IRO[322].m2)) |
50 | 50 | #define CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId, iscsiEqId) \
|
51 |
| - (IRO[320].base + ((pfId) * IRO[320].m1) + ((iscsiEqId) * IRO[320].m2)) |
| 51 | + (IRO[321].base + ((pfId) * IRO[321].m1) + ((iscsiEqId) * IRO[321].m2)) |
52 | 52 | #define CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) \
|
53 |
| - (IRO[322].base + ((pfId) * IRO[322].m1)) |
| 53 | + (IRO[323].base + ((pfId) * IRO[323].m1)) |
54 | 54 | #define CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \
|
55 |
| - (IRO[314].base + ((pfId) * IRO[314].m1)) |
| 55 | + (IRO[315].base + ((pfId) * IRO[315].m1)) |
56 | 56 | #define CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \
|
57 |
| - (IRO[313].base + ((pfId) * IRO[313].m1)) |
| 57 | + (IRO[314].base + ((pfId) * IRO[314].m1)) |
58 | 58 | #define CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \
|
59 |
| - (IRO[312].base + ((pfId) * IRO[312].m1)) |
| 59 | + (IRO[313].base + ((pfId) * IRO[313].m1)) |
60 | 60 | #define CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \
|
61 | 61 | (IRO[155].base + ((funcId) * IRO[155].m1))
|
62 | 62 | #define CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) \
|
|
99 | 99 | #define TSTORM_FUNC_EN_OFFSET(funcId) \
|
100 | 100 | (IRO[107].base + ((funcId) * IRO[107].m1))
|
101 | 101 | #define TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) \
|
102 |
| - (IRO[278].base + ((pfId) * IRO[278].m1)) |
103 |
| -#define TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) \ |
104 | 102 | (IRO[279].base + ((pfId) * IRO[279].m1))
|
105 |
| -#define TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) \ |
| 103 | +#define TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) \ |
106 | 104 | (IRO[280].base + ((pfId) * IRO[280].m1))
|
107 |
| -#define TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) \ |
| 105 | +#define TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) \ |
108 | 106 | (IRO[281].base + ((pfId) * IRO[281].m1))
|
| 107 | +#define TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) \ |
| 108 | + (IRO[282].base + ((pfId) * IRO[282].m1)) |
109 | 109 | #define TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \
|
110 |
| - (IRO[277].base + ((pfId) * IRO[277].m1)) |
| 110 | + (IRO[278].base + ((pfId) * IRO[278].m1)) |
111 | 111 | #define TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \
|
112 |
| - (IRO[276].base + ((pfId) * IRO[276].m1)) |
| 112 | + (IRO[277].base + ((pfId) * IRO[277].m1)) |
113 | 113 | #define TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \
|
114 |
| - (IRO[275].base + ((pfId) * IRO[275].m1)) |
| 114 | + (IRO[276].base + ((pfId) * IRO[276].m1)) |
115 | 115 | #define TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \
|
116 |
| - (IRO[274].base + ((pfId) * IRO[274].m1)) |
| 116 | + (IRO[275].base + ((pfId) * IRO[275].m1)) |
117 | 117 | #define TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) \
|
118 |
| - (IRO[284].base + ((pfId) * IRO[284].m1)) |
| 118 | + (IRO[285].base + ((pfId) * IRO[285].m1)) |
119 | 119 | #define TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) \
|
120 |
| - (IRO[270].base + ((pfId) * IRO[270].m1)) |
121 |
| -#define TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ |
122 | 120 | (IRO[271].base + ((pfId) * IRO[271].m1))
|
123 |
| -#define TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) \ |
| 121 | +#define TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ |
124 | 122 | (IRO[272].base + ((pfId) * IRO[272].m1))
|
125 |
| -#define TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ |
| 123 | +#define TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) \ |
126 | 124 | (IRO[273].base + ((pfId) * IRO[273].m1))
|
| 125 | +#define TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) \ |
| 126 | + (IRO[274].base + ((pfId) * IRO[274].m1)) |
127 | 127 | #define TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) \
|
128 | 128 | (IRO[206].base + ((pfId) * IRO[206].m1))
|
129 | 129 | #define TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \
|
130 | 130 | (IRO[109].base + ((funcId) * IRO[109].m1))
|
131 | 131 | #define TSTORM_TCP_MAX_CWND_OFFSET(pfId) \
|
132 |
| - (IRO[223].base + ((pfId) * IRO[223].m1)) |
| 132 | + (IRO[224].base + ((pfId) * IRO[224].m1)) |
133 | 133 | #define TSTORM_VF_TO_PF_OFFSET(funcId) \
|
134 | 134 | (IRO[108].base + ((funcId) * IRO[108].m1))
|
135 |
| -#define USTORM_AGG_DATA_OFFSET (IRO[212].base) |
136 |
| -#define USTORM_AGG_DATA_SIZE (IRO[212].size) |
| 135 | +#define USTORM_AGG_DATA_OFFSET (IRO[213].base) |
| 136 | +#define USTORM_AGG_DATA_SIZE (IRO[213].size) |
137 | 137 | #define USTORM_ASSERT_LIST_INDEX_OFFSET (IRO[181].base)
|
138 | 138 | #define USTORM_ASSERT_LIST_OFFSET(assertListEntry) \
|
139 | 139 | (IRO[180].base + ((assertListEntry) * IRO[180].m1))
|
140 | 140 | #define USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) \
|
141 | 141 | (IRO[187].base + ((portId) * IRO[187].m1))
|
142 | 142 | #define USTORM_FCOE_EQ_PROD_OFFSET(pfId) \
|
143 |
| - (IRO[325].base + ((pfId) * IRO[325].m1)) |
| 143 | + (IRO[326].base + ((pfId) * IRO[326].m1)) |
144 | 144 | #define USTORM_FUNC_EN_OFFSET(funcId) \
|
145 | 145 | (IRO[182].base + ((funcId) * IRO[182].m1))
|
146 | 146 | #define USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) \
|
147 |
| - (IRO[289].base + ((pfId) * IRO[289].m1)) |
148 |
| -#define USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \ |
149 | 147 | (IRO[290].base + ((pfId) * IRO[290].m1))
|
| 148 | +#define USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \ |
| 149 | + (IRO[291].base + ((pfId) * IRO[291].m1)) |
150 | 150 | #define USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) \
|
151 |
| - (IRO[294].base + ((pfId) * IRO[294].m1)) |
| 151 | + (IRO[295].base + ((pfId) * IRO[295].m1)) |
152 | 152 | #define USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) \
|
153 |
| - (IRO[291].base + ((pfId) * IRO[291].m1)) |
| 153 | + (IRO[292].base + ((pfId) * IRO[292].m1)) |
154 | 154 | #define USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \
|
155 |
| - (IRO[287].base + ((pfId) * IRO[287].m1)) |
| 155 | + (IRO[288].base + ((pfId) * IRO[288].m1)) |
156 | 156 | #define USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \
|
157 |
| - (IRO[286].base + ((pfId) * IRO[286].m1)) |
| 157 | + (IRO[287].base + ((pfId) * IRO[287].m1)) |
158 | 158 | #define USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \
|
159 |
| - (IRO[285].base + ((pfId) * IRO[285].m1)) |
| 159 | + (IRO[286].base + ((pfId) * IRO[286].m1)) |
160 | 160 | #define USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \
|
161 |
| - (IRO[288].base + ((pfId) * IRO[288].m1)) |
| 161 | + (IRO[289].base + ((pfId) * IRO[289].m1)) |
162 | 162 | #define USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) \
|
163 |
| - (IRO[292].base + ((pfId) * IRO[292].m1)) |
164 |
| -#define USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \ |
165 | 163 | (IRO[293].base + ((pfId) * IRO[293].m1))
|
| 164 | +#define USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \ |
| 165 | + (IRO[294].base + ((pfId) * IRO[294].m1)) |
166 | 166 | #define USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) \
|
167 | 167 | (IRO[186].base + ((pfId) * IRO[186].m1))
|
168 | 168 | #define USTORM_RECORD_SLOW_PATH_OFFSET(funcId) \
|
169 | 169 | (IRO[184].base + ((funcId) * IRO[184].m1))
|
170 | 170 | #define USTORM_RX_PRODS_E1X_OFFSET(portId, clientId) \
|
171 |
| - (IRO[215].base + ((portId) * IRO[215].m1) + ((clientId) * \ |
172 |
| - IRO[215].m2)) |
| 171 | + (IRO[216].base + ((portId) * IRO[216].m1) + ((clientId) * \ |
| 172 | + IRO[216].m2)) |
173 | 173 | #define USTORM_RX_PRODS_E2_OFFSET(qzoneId) \
|
174 |
| - (IRO[216].base + ((qzoneId) * IRO[216].m1)) |
175 |
| -#define USTORM_TPA_BTR_OFFSET (IRO[213].base) |
176 |
| -#define USTORM_TPA_BTR_SIZE (IRO[213].size) |
| 174 | + (IRO[217].base + ((qzoneId) * IRO[217].m1)) |
| 175 | +#define USTORM_TPA_BTR_OFFSET (IRO[214].base) |
| 176 | +#define USTORM_TPA_BTR_SIZE (IRO[214].size) |
177 | 177 | #define USTORM_VF_TO_PF_OFFSET(funcId) \
|
178 | 178 | (IRO[183].base + ((funcId) * IRO[183].m1))
|
179 | 179 | #define XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE (IRO[67].base)
|
|
188 | 188 | #define XSTORM_FUNC_EN_OFFSET(funcId) \
|
189 | 189 | (IRO[47].base + ((funcId) * IRO[47].m1))
|
190 | 190 | #define XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) \
|
191 |
| - (IRO[302].base + ((pfId) * IRO[302].m1)) |
| 191 | + (IRO[303].base + ((pfId) * IRO[303].m1)) |
192 | 192 | #define XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) \
|
193 |
| - (IRO[305].base + ((pfId) * IRO[305].m1)) |
194 |
| -#define XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) \ |
195 | 193 | (IRO[306].base + ((pfId) * IRO[306].m1))
|
196 |
| -#define XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) \ |
| 194 | +#define XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) \ |
197 | 195 | (IRO[307].base + ((pfId) * IRO[307].m1))
|
198 |
| -#define XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) \ |
| 196 | +#define XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) \ |
199 | 197 | (IRO[308].base + ((pfId) * IRO[308].m1))
|
200 |
| -#define XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) \ |
| 198 | +#define XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) \ |
201 | 199 | (IRO[309].base + ((pfId) * IRO[309].m1))
|
202 |
| -#define XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) \ |
| 200 | +#define XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) \ |
203 | 201 | (IRO[310].base + ((pfId) * IRO[310].m1))
|
204 |
| -#define XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) \ |
| 202 | +#define XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) \ |
205 | 203 | (IRO[311].base + ((pfId) * IRO[311].m1))
|
| 204 | +#define XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) \ |
| 205 | + (IRO[312].base + ((pfId) * IRO[312].m1)) |
206 | 206 | #define XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \
|
207 |
| - (IRO[301].base + ((pfId) * IRO[301].m1)) |
| 207 | + (IRO[302].base + ((pfId) * IRO[302].m1)) |
208 | 208 | #define XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \
|
209 |
| - (IRO[300].base + ((pfId) * IRO[300].m1)) |
| 209 | + (IRO[301].base + ((pfId) * IRO[301].m1)) |
210 | 210 | #define XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \
|
211 |
| - (IRO[299].base + ((pfId) * IRO[299].m1)) |
| 211 | + (IRO[300].base + ((pfId) * IRO[300].m1)) |
212 | 212 | #define XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \
|
213 |
| - (IRO[304].base + ((pfId) * IRO[304].m1)) |
| 213 | + (IRO[305].base + ((pfId) * IRO[305].m1)) |
214 | 214 | #define XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) \
|
215 |
| - (IRO[303].base + ((pfId) * IRO[303].m1)) |
| 215 | + (IRO[304].base + ((pfId) * IRO[304].m1)) |
216 | 216 | #define XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) \
|
217 |
| - (IRO[298].base + ((pfId) * IRO[298].m1)) |
| 217 | + (IRO[299].base + ((pfId) * IRO[299].m1)) |
218 | 218 | #define XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) \
|
219 |
| - (IRO[297].base + ((pfId) * IRO[297].m1)) |
| 219 | + (IRO[298].base + ((pfId) * IRO[298].m1)) |
220 | 220 | #define XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) \
|
221 |
| - (IRO[296].base + ((pfId) * IRO[296].m1)) |
| 221 | + (IRO[297].base + ((pfId) * IRO[297].m1)) |
222 | 222 | #define XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) \
|
223 |
| - (IRO[295].base + ((pfId) * IRO[295].m1)) |
| 223 | + (IRO[296].base + ((pfId) * IRO[296].m1)) |
224 | 224 | #define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) \
|
225 | 225 | (IRO[44].base + ((pfId) * IRO[44].m1))
|
226 | 226 | #define XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \
|
|
233 | 233 | #define XSTORM_SPQ_PROD_OFFSET(funcId) \
|
234 | 234 | (IRO[31].base + ((funcId) * IRO[31].m1))
|
235 | 235 | #define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) \
|
236 |
| - (IRO[217].base + ((portId) * IRO[217].m1)) |
237 |
| -#define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) \ |
238 | 236 | (IRO[218].base + ((portId) * IRO[218].m1))
|
| 237 | +#define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) \ |
| 238 | + (IRO[219].base + ((portId) * IRO[219].m1)) |
239 | 239 | #define XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) \
|
240 |
| - (IRO[220].base + (((pfId)>>1) * IRO[220].m1) + (((pfId)&1) * \ |
241 |
| - IRO[220].m2)) |
| 240 | + (IRO[221].base + (((pfId)>>1) * IRO[221].m1) + (((pfId)&1) * \ |
| 241 | + IRO[221].m2)) |
242 | 242 | #define XSTORM_VF_TO_PF_OFFSET(funcId) \
|
243 | 243 | (IRO[48].base + ((funcId) * IRO[48].m1))
|
244 | 244 | #define COMMON_ASM_INVALID_ASSERT_OPCODE 0x0
|
|
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