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1. Viterbi-Algorithm Viterbi-Algorithm Public

   This is about the implementation of (2,1,4) Convolutional Encoder and Viterbi Decoder using Verilog VHDL.

   Verilog 12 4

2. Mycodes Mycodes Public

   For testing purpose

   1

3. avmm_sha3 avmm_sha3 Public

   Forked from BharathS11/avmm_sha3

   UVM testbench for an sha3 implementation with Avalon MM interface

   Verilog 1

4. avst_adder avst_adder Public

   Forked from euvm/avst_adder

   Example setup for UVM driven Icarus Verilog Simulation

   D 1

5. portfolio portfolio Public

   Forked from ab-hi/portfolio

   my personal resume website

   HTML 1

6. SPI-Interface SPI-Interface Public

   Forked from Anjali-287/SPI-Interface

   UVM Testbench to verify serial transmission of data between SPI master and slave

   SystemVerilog 1