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Increase alignment of AArch64AbsLongThunk to 8 #244

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smithp35
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@smithp35 smithp35 commented Apr 1, 2025

This permits an AArch64AbsLongThunk to be used in an environment where unaligned accesses are disabled.

The AArch64AbsLongThunk does a load of an 8-byte address. When unaligned accesses are disabled this address must be 8-byte aligned.

The vast majority of AArch64 systems will have unaligned accesses enabled in userspace. However, after a reset, before the MMU has been enabled, all memory accesses are to "device" memory, which requires aligned accesses. In systems with multi-stage boot loaders a thunk may be required to a later stage before the MMU has been enabled.

As we only want to increase the alignment when the ldr is used we delay the increase in thunk alignment until we know we are going to write an ldr. We also need to account for the ThunkSection alignment increase when this happens.

In some of the test updates, particularly those with shared CHECK lines with position independent thunks it was easier to ensure that the thunks started at an 8-byte aligned address in all cases.

This is a cherry-pick of upstream llvm-project PR 133738 to the arm-software release/20.x branch.

Downstream issue: #243

This permits an AArch64AbsLongThunk to be used in an environment where
unaligned accesses are disabled.

The AArch64AbsLongThunk does a load of an 8-byte address. When unaligned
accesses are disabled this address must be 8-byte aligned.

The vast majority of AArch64 systems will have unaligned accesses
enabled in userspace. However, after a reset, before the MMU has been
enabled, all memory accesses are to "device" memory, which requires
aligned accesses. In systems with multi-stage boot loaders a thunk may
be required to a later stage before the MMU has been enabled.

As we only want to increase the alignment when the ldr is used we delay
the increase in thunk alignment until we know we are going to write an
ldr. We also need to account for the ThunkSection alignment increase
when this happens.

In some of the test updates, particularly those with shared CHECK lines
with position independent thunks it was easier to ensure that the thunks
started at an 8-byte aligned address in all cases.

This is a cherry-pick of upstream llvm-project PR 133738 to the
arm-software release/20.x branch.

Downstream issue: arm#243
@smithp35
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smithp35 commented Apr 1, 2025

Will abandon this in favour of a patch file based update like #216

@smithp35 smithp35 closed this Apr 1, 2025
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