- RTL Programming with custom IP creation
- Prefetching
- Time-Triggreed systems
- Pynq-Linux OS creation
- Machine Learning
- VHDL, Verilog, Python, C, C++, Embedded C
- Vivado, Vitis, Vitis HLS, SDK, ModelSim, Pynq, PetaLinux, Jupyter Notebook, Visual Studio
- Optimizing deep learning model performance through the integartion of a Time-triggered memory cache with Versatile Tensor Accelerator
- Development of custom Linux OS for custom boards (Case: TE0802 Ultrascale+ with TVM/VTA interface)
- DRAM Pattern analysis for VTA Load module schedule simplification
- Wireless Aerial Painter - Funded by the Govt. of India
- FPGA-based Neural Network implementation on TE0802 board using HLS and RTL programming
- Nature photography 🌲📷
- Hiking 🥾⛺🚵🧗🏞️
- Reading productivity and philosophical books 📚