Fixed un-renamed CodeGenTargetMachineImpl Intheritances in Experimental Targets #116290

matinraayai · 2024-11-14T22:31:57Z

This PR fixes a set of build issues with experimental targets happened in result of merging #111234 to master.

…ental targets.

github-actions · 2024-11-14T22:33:40Z

⚠️ We detected that you are using a GitHub private e-mail address to contribute to the repo.
Please turn off Keep my email addresses private setting in your account.
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github-actions · 2024-11-14T22:35:29Z

✅ With the latest revision this PR passed the C/C++ code formatter.

arsenm · 2024-11-14T22:41:49Z

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Should fix this

matinraayai · 2024-11-14T22:45:24Z

⚠️ We detected that you are using a GitHub private e-mail address to contribute to the repo. Please turn off Keep my email addresses private setting in your account. See LLVM Discourse for more information.

Should fix this

My email address should be public now.

…tMachineImpl.

matinraayai · 2024-11-14T23:29:48Z

@arsenm I replaced some leftover mentions of LLVMTargetMachine in the comments. I built the experimental targets on my end and it seems to build fine, and the tests pass on my end. Let me know if there's anything else I need to fix on my part.
Sorry for breaking change.

bogner

Looks good!

llvmbot · 2024-11-16T14:16:46Z

@llvm/pr-subscribers-backend-systemz

Author: Matin Raayai (matinraayai)

Changes

This PR fixes a set of build issues with experimental targets happened in result of merging #111234 to master.

Full diff: https://github.com/llvm/llvm-project/pull/116290.diff

11 Files Affected:

(modified) llvm/include/llvm/CodeGen/TargetPassConfig.h (+2-1)
(modified) llvm/include/llvm/MC/MCAsmInfo.h (+1-1)
(modified) llvm/include/llvm/Passes/CodeGenPassBuilder.h (+2-1)
(modified) llvm/lib/Target/ARC/ARCTargetMachine.cpp (+6-5)
(modified) llvm/lib/Target/CSKY/CSKYTargetMachine.cpp (+3-3)
(modified) llvm/lib/Target/DirectX/DirectXTargetMachine.cpp (+1-1)
(modified) llvm/lib/Target/M68k/M68kTargetMachine.cpp (+3-3)
(modified) llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp (+2-2)
(modified) llvm/lib/Target/PowerPC/PPCTargetMachine.cpp (+2-2)
(modified) llvm/lib/Target/SystemZ/SystemZTargetMachine.h (+1-1)
(modified) llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp (+4-3)

diff --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index 85f87de521855f..66c79c74f2be55 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -413,7 +413,8 @@ class TargetPassConfig : public ImmutablePass {
   virtual void addFastRegAlloc();
 
   /// addOptimizedRegAlloc - Add passes related to register allocation.
-  /// CodeGenCommonTMImpl provides standard regalloc passes for most targets.
+  /// CodeGenTargetMachineImpl provides standard regalloc passes for most
+  /// targets.
   virtual void addOptimizedRegAlloc();
 
   /// addPreRewrite - Add passes to the optimized register allocation pipeline
diff --git a/llvm/include/llvm/MC/MCAsmInfo.h b/llvm/include/llvm/MC/MCAsmInfo.h
index ccb7c524d45f8d..cf31c36cc4cef8 100644
--- a/llvm/include/llvm/MC/MCAsmInfo.h
+++ b/llvm/include/llvm/MC/MCAsmInfo.h
@@ -484,7 +484,7 @@ class MCAsmInfo {
   /// The integrated assembler should be enabled by default (by the
   /// constructors) when failing to parse a valid piece of assembly (inline
   /// or otherwise) is considered a bug. It may then be overridden after
-  /// construction (see LLVMTargetMachine::initAsmInfo()).
+  /// construction (see CodeGenTargetMachineImpl::initAsmInfo()).
   bool UseIntegratedAssembler;
 
   /// Use AsmParser to parse inlineAsm when UseIntegratedAssembler is not set.
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index d04387535db0da..7fa6fa118fe551 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -443,7 +443,8 @@ template <typename DerivedT, typename TargetMachineT> class CodeGenPassBuilder {
   Error addFastRegAlloc(AddMachinePass &) const;
 
   /// addOptimizedRegAlloc - Add passes related to register allocation.
-  /// CodeGenCommonTMImpl provides standard regalloc passes for most targets.
+  /// CodeGenTargetMachineImpl provides standard regalloc passes for most
+  /// targets.
   void addOptimizedRegAlloc(AddMachinePass &) const;
 
   /// Add passes that optimize machine instructions after register allocation.
diff --git a/llvm/lib/Target/ARC/ARCTargetMachine.cpp b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
index df8c96a4d97935..57e0177cd37486 100644
--- a/llvm/lib/Target/ARC/ARCTargetMachine.cpp
+++ b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
@@ -33,11 +33,12 @@ ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT,
                                    std::optional<Reloc::Model> RM,
                                    std::optional<CodeModel::Model> CM,
                                    CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T,
-                          "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
-                          "f32:32:32-i64:32-f64:32-a:0:32-n32",
-                          TT, CPU, FS, Options, getRelocModel(RM),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(
+          T,
+          "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
+          "f32:32:32-i64:32-f64:32-a:0:32-n32",
+          TT, CPU, FS, Options, getRelocModel(RM),
+          getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<TargetLoweringObjectFileELF>()),
       Subtarget(TT, std::string(CPU), std::string(FS), *this) {
   initAsmInfo();
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
index c256bb2d6a4cdd..ae6ef89fdcd072 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
@@ -54,9 +54,9 @@ CSKYTargetMachine::CSKYTargetMachine(const Target &T, const Triple &TT,
                                      std::optional<Reloc::Model> RM,
                                      std::optional<CodeModel::Model> CM,
                                      CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT), TT, CPU, FS, Options,
-                          RM.value_or(Reloc::Static),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT), TT, CPU, FS, Options,
+                               RM.value_or(Reloc::Static),
+                               getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<CSKYELFTargetObjectFile>()) {
   initAsmInfo();
 }
diff --git a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
index 914aee4f8b4b9d..655427a3e80209 100644
--- a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
+++ b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
@@ -108,7 +108,7 @@ DirectXTargetMachine::DirectXTargetMachine(const Target &T, const Triple &TT,
                                            std::optional<Reloc::Model> RM,
                                            std::optional<CodeModel::Model> CM,
                                            CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(
+    : CodeGenTargetMachineImpl(
           T,
           "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-"
           "f32:32-f64:64-n8:16:32:64",
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.cpp b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
index ce5970c5ec95da..2f5a2e8288a261 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.cpp
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
@@ -100,9 +100,9 @@ M68kTargetMachine::M68kTargetMachine(const Target &T, const Triple &TT,
                                      std::optional<Reloc::Model> RM,
                                      std::optional<CodeModel::Model> CM,
                                      CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
-                          Options, getEffectiveRelocModel(TT, RM),
-                          ::getEffectiveCodeModel(CM, JIT), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU,
+                               FS, Options, getEffectiveRelocModel(TT, RM),
+                               ::getEffectiveCodeModel(CM, JIT), OL),
       TLOF(std::make_unique<M68kELFTargetObjectFile>()),
       Subtarget(TT, CPU, FS, *this) {
   initAsmInfo();
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index a388b44b3ac837..e547e62094404f 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -805,8 +805,8 @@ MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
   ELFObjectWriter &W = getStreamer().getWriter();
 
   // It's possible that MCObjectFileInfo isn't fully initialized at this point
-  // due to an initialization order problem where CodeGenCommonTMImpl creates
-  // the target streamer before TargetLoweringObjectFile calls
+  // due to an initialization order problem where CodeGenTargetMachineImpl
+  // creates the target streamer before TargetLoweringObjectFile calls
   // InitializeMCObjectFileInfo. There doesn't seem to be a single place that
   // covers all cases so this statement covers most cases and direct object
   // emission must call setPic() once MCObjectFileInfo has been initialized. The
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 1f6866383e6067..2b64ab9aa6973d 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -345,8 +345,8 @@ static ScheduleDAGInstrs *createPPCPostMachineScheduler(
 
 // The FeatureString here is a little subtle. We are modifying the feature
 // string with what are (currently) non-function specific overrides as it goes
-// into the CodeGenCommonTMImpl constructor and then using the stored value in
-// the Subtarget constructor below it.
+// into the CodeGenTargetMachineImpl constructor and then using the stored value
+// in the Subtarget constructor below it.
 PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
                                    StringRef CPU, StringRef FS,
                                    const TargetOptions &Options,
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
index 75b622046a6307..e8eeb85647b83f 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
@@ -44,7 +44,7 @@ class SystemZTargetMachine : public CodeGenTargetMachineImpl {
   // attributes of each function.
   const SystemZSubtarget *getSubtargetImpl() const = delete;
 
-  // Override LLVMTargetMachine
+  // Override CodeGenTargetMachineImpl
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
   TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
 
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
index 7fb998d615c464..634ada375a3dc1 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
@@ -50,9 +50,10 @@ XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT,
                                          std::optional<CodeModel::Model> CM,
                                          CodeGenOptLevel OL, bool JIT,
                                          bool IsLittle)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT, CPU, Options, IsLittle), TT,
-                          CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options, IsLittle),
+                               TT, CPU, FS, Options,
+                               getEffectiveRelocModel(JIT, RM),
+                               getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<TargetLoweringObjectFileELF>()) {
   initAsmInfo();
 }

llvmbot · 2024-11-16T14:16:46Z

@llvm/pr-subscribers-backend-m68k

Author: Matin Raayai (matinraayai)

Changes

This PR fixes a set of build issues with experimental targets happened in result of merging #111234 to master.

Full diff: https://github.com/llvm/llvm-project/pull/116290.diff

11 Files Affected:

(modified) llvm/include/llvm/CodeGen/TargetPassConfig.h (+2-1)
(modified) llvm/include/llvm/MC/MCAsmInfo.h (+1-1)
(modified) llvm/include/llvm/Passes/CodeGenPassBuilder.h (+2-1)
(modified) llvm/lib/Target/ARC/ARCTargetMachine.cpp (+6-5)
(modified) llvm/lib/Target/CSKY/CSKYTargetMachine.cpp (+3-3)
(modified) llvm/lib/Target/DirectX/DirectXTargetMachine.cpp (+1-1)
(modified) llvm/lib/Target/M68k/M68kTargetMachine.cpp (+3-3)
(modified) llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp (+2-2)
(modified) llvm/lib/Target/PowerPC/PPCTargetMachine.cpp (+2-2)
(modified) llvm/lib/Target/SystemZ/SystemZTargetMachine.h (+1-1)
(modified) llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp (+4-3)

diff --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index 85f87de521855f..66c79c74f2be55 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -413,7 +413,8 @@ class TargetPassConfig : public ImmutablePass {
   virtual void addFastRegAlloc();
 
   /// addOptimizedRegAlloc - Add passes related to register allocation.
-  /// CodeGenCommonTMImpl provides standard regalloc passes for most targets.
+  /// CodeGenTargetMachineImpl provides standard regalloc passes for most
+  /// targets.
   virtual void addOptimizedRegAlloc();
 
   /// addPreRewrite - Add passes to the optimized register allocation pipeline
diff --git a/llvm/include/llvm/MC/MCAsmInfo.h b/llvm/include/llvm/MC/MCAsmInfo.h
index ccb7c524d45f8d..cf31c36cc4cef8 100644
--- a/llvm/include/llvm/MC/MCAsmInfo.h
+++ b/llvm/include/llvm/MC/MCAsmInfo.h
@@ -484,7 +484,7 @@ class MCAsmInfo {
   /// The integrated assembler should be enabled by default (by the
   /// constructors) when failing to parse a valid piece of assembly (inline
   /// or otherwise) is considered a bug. It may then be overridden after
-  /// construction (see LLVMTargetMachine::initAsmInfo()).
+  /// construction (see CodeGenTargetMachineImpl::initAsmInfo()).
   bool UseIntegratedAssembler;
 
   /// Use AsmParser to parse inlineAsm when UseIntegratedAssembler is not set.
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index d04387535db0da..7fa6fa118fe551 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -443,7 +443,8 @@ template <typename DerivedT, typename TargetMachineT> class CodeGenPassBuilder {
   Error addFastRegAlloc(AddMachinePass &) const;
 
   /// addOptimizedRegAlloc - Add passes related to register allocation.
-  /// CodeGenCommonTMImpl provides standard regalloc passes for most targets.
+  /// CodeGenTargetMachineImpl provides standard regalloc passes for most
+  /// targets.
   void addOptimizedRegAlloc(AddMachinePass &) const;
 
   /// Add passes that optimize machine instructions after register allocation.
diff --git a/llvm/lib/Target/ARC/ARCTargetMachine.cpp b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
index df8c96a4d97935..57e0177cd37486 100644
--- a/llvm/lib/Target/ARC/ARCTargetMachine.cpp
+++ b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
@@ -33,11 +33,12 @@ ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT,
                                    std::optional<Reloc::Model> RM,
                                    std::optional<CodeModel::Model> CM,
                                    CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T,
-                          "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
-                          "f32:32:32-i64:32-f64:32-a:0:32-n32",
-                          TT, CPU, FS, Options, getRelocModel(RM),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(
+          T,
+          "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
+          "f32:32:32-i64:32-f64:32-a:0:32-n32",
+          TT, CPU, FS, Options, getRelocModel(RM),
+          getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<TargetLoweringObjectFileELF>()),
       Subtarget(TT, std::string(CPU), std::string(FS), *this) {
   initAsmInfo();
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
index c256bb2d6a4cdd..ae6ef89fdcd072 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
@@ -54,9 +54,9 @@ CSKYTargetMachine::CSKYTargetMachine(const Target &T, const Triple &TT,
                                      std::optional<Reloc::Model> RM,
                                      std::optional<CodeModel::Model> CM,
                                      CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT), TT, CPU, FS, Options,
-                          RM.value_or(Reloc::Static),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT), TT, CPU, FS, Options,
+                               RM.value_or(Reloc::Static),
+                               getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<CSKYELFTargetObjectFile>()) {
   initAsmInfo();
 }
diff --git a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
index 914aee4f8b4b9d..655427a3e80209 100644
--- a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
+++ b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
@@ -108,7 +108,7 @@ DirectXTargetMachine::DirectXTargetMachine(const Target &T, const Triple &TT,
                                            std::optional<Reloc::Model> RM,
                                            std::optional<CodeModel::Model> CM,
                                            CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(
+    : CodeGenTargetMachineImpl(
           T,
           "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-"
           "f32:32-f64:64-n8:16:32:64",
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.cpp b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
index ce5970c5ec95da..2f5a2e8288a261 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.cpp
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
@@ -100,9 +100,9 @@ M68kTargetMachine::M68kTargetMachine(const Target &T, const Triple &TT,
                                      std::optional<Reloc::Model> RM,
                                      std::optional<CodeModel::Model> CM,
                                      CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
-                          Options, getEffectiveRelocModel(TT, RM),
-                          ::getEffectiveCodeModel(CM, JIT), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU,
+                               FS, Options, getEffectiveRelocModel(TT, RM),
+                               ::getEffectiveCodeModel(CM, JIT), OL),
       TLOF(std::make_unique<M68kELFTargetObjectFile>()),
       Subtarget(TT, CPU, FS, *this) {
   initAsmInfo();
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index a388b44b3ac837..e547e62094404f 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -805,8 +805,8 @@ MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
   ELFObjectWriter &W = getStreamer().getWriter();
 
   // It's possible that MCObjectFileInfo isn't fully initialized at this point
-  // due to an initialization order problem where CodeGenCommonTMImpl creates
-  // the target streamer before TargetLoweringObjectFile calls
+  // due to an initialization order problem where CodeGenTargetMachineImpl
+  // creates the target streamer before TargetLoweringObjectFile calls
   // InitializeMCObjectFileInfo. There doesn't seem to be a single place that
   // covers all cases so this statement covers most cases and direct object
   // emission must call setPic() once MCObjectFileInfo has been initialized. The
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 1f6866383e6067..2b64ab9aa6973d 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -345,8 +345,8 @@ static ScheduleDAGInstrs *createPPCPostMachineScheduler(
 
 // The FeatureString here is a little subtle. We are modifying the feature
 // string with what are (currently) non-function specific overrides as it goes
-// into the CodeGenCommonTMImpl constructor and then using the stored value in
-// the Subtarget constructor below it.
+// into the CodeGenTargetMachineImpl constructor and then using the stored value
+// in the Subtarget constructor below it.
 PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
                                    StringRef CPU, StringRef FS,
                                    const TargetOptions &Options,
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
index 75b622046a6307..e8eeb85647b83f 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
@@ -44,7 +44,7 @@ class SystemZTargetMachine : public CodeGenTargetMachineImpl {
   // attributes of each function.
   const SystemZSubtarget *getSubtargetImpl() const = delete;
 
-  // Override LLVMTargetMachine
+  // Override CodeGenTargetMachineImpl
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
   TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
 
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
index 7fb998d615c464..634ada375a3dc1 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
@@ -50,9 +50,10 @@ XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT,
                                          std::optional<CodeModel::Model> CM,
                                          CodeGenOptLevel OL, bool JIT,
                                          bool IsLittle)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT, CPU, Options, IsLittle), TT,
-                          CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options, IsLittle),
+                               TT, CPU, FS, Options,
+                               getEffectiveRelocModel(JIT, RM),
+                               getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<TargetLoweringObjectFileELF>()) {
   initAsmInfo();
 }

llvmbot · 2024-11-16T14:16:47Z

@llvm/pr-subscribers-backend-directx

Author: Matin Raayai (matinraayai)

Changes

This PR fixes a set of build issues with experimental targets happened in result of merging #111234 to master.

Full diff: https://github.com/llvm/llvm-project/pull/116290.diff

11 Files Affected:

(modified) llvm/include/llvm/CodeGen/TargetPassConfig.h (+2-1)
(modified) llvm/include/llvm/MC/MCAsmInfo.h (+1-1)
(modified) llvm/include/llvm/Passes/CodeGenPassBuilder.h (+2-1)
(modified) llvm/lib/Target/ARC/ARCTargetMachine.cpp (+6-5)
(modified) llvm/lib/Target/CSKY/CSKYTargetMachine.cpp (+3-3)
(modified) llvm/lib/Target/DirectX/DirectXTargetMachine.cpp (+1-1)
(modified) llvm/lib/Target/M68k/M68kTargetMachine.cpp (+3-3)
(modified) llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp (+2-2)
(modified) llvm/lib/Target/PowerPC/PPCTargetMachine.cpp (+2-2)
(modified) llvm/lib/Target/SystemZ/SystemZTargetMachine.h (+1-1)
(modified) llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp (+4-3)

diff --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index 85f87de521855f..66c79c74f2be55 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -413,7 +413,8 @@ class TargetPassConfig : public ImmutablePass {
   virtual void addFastRegAlloc();
 
   /// addOptimizedRegAlloc - Add passes related to register allocation.
-  /// CodeGenCommonTMImpl provides standard regalloc passes for most targets.
+  /// CodeGenTargetMachineImpl provides standard regalloc passes for most
+  /// targets.
   virtual void addOptimizedRegAlloc();
 
   /// addPreRewrite - Add passes to the optimized register allocation pipeline
diff --git a/llvm/include/llvm/MC/MCAsmInfo.h b/llvm/include/llvm/MC/MCAsmInfo.h
index ccb7c524d45f8d..cf31c36cc4cef8 100644
--- a/llvm/include/llvm/MC/MCAsmInfo.h
+++ b/llvm/include/llvm/MC/MCAsmInfo.h
@@ -484,7 +484,7 @@ class MCAsmInfo {
   /// The integrated assembler should be enabled by default (by the
   /// constructors) when failing to parse a valid piece of assembly (inline
   /// or otherwise) is considered a bug. It may then be overridden after
-  /// construction (see LLVMTargetMachine::initAsmInfo()).
+  /// construction (see CodeGenTargetMachineImpl::initAsmInfo()).
   bool UseIntegratedAssembler;
 
   /// Use AsmParser to parse inlineAsm when UseIntegratedAssembler is not set.
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index d04387535db0da..7fa6fa118fe551 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -443,7 +443,8 @@ template <typename DerivedT, typename TargetMachineT> class CodeGenPassBuilder {
   Error addFastRegAlloc(AddMachinePass &) const;
 
   /// addOptimizedRegAlloc - Add passes related to register allocation.
-  /// CodeGenCommonTMImpl provides standard regalloc passes for most targets.
+  /// CodeGenTargetMachineImpl provides standard regalloc passes for most
+  /// targets.
   void addOptimizedRegAlloc(AddMachinePass &) const;
 
   /// Add passes that optimize machine instructions after register allocation.
diff --git a/llvm/lib/Target/ARC/ARCTargetMachine.cpp b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
index df8c96a4d97935..57e0177cd37486 100644
--- a/llvm/lib/Target/ARC/ARCTargetMachine.cpp
+++ b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
@@ -33,11 +33,12 @@ ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT,
                                    std::optional<Reloc::Model> RM,
                                    std::optional<CodeModel::Model> CM,
                                    CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T,
-                          "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
-                          "f32:32:32-i64:32-f64:32-a:0:32-n32",
-                          TT, CPU, FS, Options, getRelocModel(RM),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(
+          T,
+          "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
+          "f32:32:32-i64:32-f64:32-a:0:32-n32",
+          TT, CPU, FS, Options, getRelocModel(RM),
+          getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<TargetLoweringObjectFileELF>()),
       Subtarget(TT, std::string(CPU), std::string(FS), *this) {
   initAsmInfo();
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
index c256bb2d6a4cdd..ae6ef89fdcd072 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
@@ -54,9 +54,9 @@ CSKYTargetMachine::CSKYTargetMachine(const Target &T, const Triple &TT,
                                      std::optional<Reloc::Model> RM,
                                      std::optional<CodeModel::Model> CM,
                                      CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT), TT, CPU, FS, Options,
-                          RM.value_or(Reloc::Static),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT), TT, CPU, FS, Options,
+                               RM.value_or(Reloc::Static),
+                               getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<CSKYELFTargetObjectFile>()) {
   initAsmInfo();
 }
diff --git a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
index 914aee4f8b4b9d..655427a3e80209 100644
--- a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
+++ b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
@@ -108,7 +108,7 @@ DirectXTargetMachine::DirectXTargetMachine(const Target &T, const Triple &TT,
                                            std::optional<Reloc::Model> RM,
                                            std::optional<CodeModel::Model> CM,
                                            CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(
+    : CodeGenTargetMachineImpl(
           T,
           "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-"
           "f32:32-f64:64-n8:16:32:64",
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.cpp b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
index ce5970c5ec95da..2f5a2e8288a261 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.cpp
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
@@ -100,9 +100,9 @@ M68kTargetMachine::M68kTargetMachine(const Target &T, const Triple &TT,
                                      std::optional<Reloc::Model> RM,
                                      std::optional<CodeModel::Model> CM,
                                      CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
-                          Options, getEffectiveRelocModel(TT, RM),
-                          ::getEffectiveCodeModel(CM, JIT), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU,
+                               FS, Options, getEffectiveRelocModel(TT, RM),
+                               ::getEffectiveCodeModel(CM, JIT), OL),
       TLOF(std::make_unique<M68kELFTargetObjectFile>()),
       Subtarget(TT, CPU, FS, *this) {
   initAsmInfo();
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index a388b44b3ac837..e547e62094404f 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -805,8 +805,8 @@ MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
   ELFObjectWriter &W = getStreamer().getWriter();
 
   // It's possible that MCObjectFileInfo isn't fully initialized at this point
-  // due to an initialization order problem where CodeGenCommonTMImpl creates
-  // the target streamer before TargetLoweringObjectFile calls
+  // due to an initialization order problem where CodeGenTargetMachineImpl
+  // creates the target streamer before TargetLoweringObjectFile calls
   // InitializeMCObjectFileInfo. There doesn't seem to be a single place that
   // covers all cases so this statement covers most cases and direct object
   // emission must call setPic() once MCObjectFileInfo has been initialized. The
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 1f6866383e6067..2b64ab9aa6973d 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -345,8 +345,8 @@ static ScheduleDAGInstrs *createPPCPostMachineScheduler(
 
 // The FeatureString here is a little subtle. We are modifying the feature
 // string with what are (currently) non-function specific overrides as it goes
-// into the CodeGenCommonTMImpl constructor and then using the stored value in
-// the Subtarget constructor below it.
+// into the CodeGenTargetMachineImpl constructor and then using the stored value
+// in the Subtarget constructor below it.
 PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
                                    StringRef CPU, StringRef FS,
                                    const TargetOptions &Options,
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
index 75b622046a6307..e8eeb85647b83f 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
@@ -44,7 +44,7 @@ class SystemZTargetMachine : public CodeGenTargetMachineImpl {
   // attributes of each function.
   const SystemZSubtarget *getSubtargetImpl() const = delete;
 
-  // Override LLVMTargetMachine
+  // Override CodeGenTargetMachineImpl
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
   TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
 
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
index 7fb998d615c464..634ada375a3dc1 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
@@ -50,9 +50,10 @@ XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT,
                                          std::optional<CodeModel::Model> CM,
                                          CodeGenOptLevel OL, bool JIT,
                                          bool IsLittle)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT, CPU, Options, IsLittle), TT,
-                          CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options, IsLittle),
+                               TT, CPU, FS, Options,
+                               getEffectiveRelocModel(JIT, RM),
+                               getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<TargetLoweringObjectFileELF>()) {
   initAsmInfo();
 }

llvmbot · 2024-11-16T14:16:47Z

@llvm/pr-subscribers-backend-powerpc

Author: Matin Raayai (matinraayai)

Changes

This PR fixes a set of build issues with experimental targets happened in result of merging #111234 to master.

Full diff: https://github.com/llvm/llvm-project/pull/116290.diff

11 Files Affected:

(modified) llvm/include/llvm/CodeGen/TargetPassConfig.h (+2-1)
(modified) llvm/include/llvm/MC/MCAsmInfo.h (+1-1)
(modified) llvm/include/llvm/Passes/CodeGenPassBuilder.h (+2-1)
(modified) llvm/lib/Target/ARC/ARCTargetMachine.cpp (+6-5)
(modified) llvm/lib/Target/CSKY/CSKYTargetMachine.cpp (+3-3)
(modified) llvm/lib/Target/DirectX/DirectXTargetMachine.cpp (+1-1)
(modified) llvm/lib/Target/M68k/M68kTargetMachine.cpp (+3-3)
(modified) llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp (+2-2)
(modified) llvm/lib/Target/PowerPC/PPCTargetMachine.cpp (+2-2)
(modified) llvm/lib/Target/SystemZ/SystemZTargetMachine.h (+1-1)
(modified) llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp (+4-3)

diff --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index 85f87de521855f..66c79c74f2be55 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -413,7 +413,8 @@ class TargetPassConfig : public ImmutablePass {
   virtual void addFastRegAlloc();
 
   /// addOptimizedRegAlloc - Add passes related to register allocation.
-  /// CodeGenCommonTMImpl provides standard regalloc passes for most targets.
+  /// CodeGenTargetMachineImpl provides standard regalloc passes for most
+  /// targets.
   virtual void addOptimizedRegAlloc();
 
   /// addPreRewrite - Add passes to the optimized register allocation pipeline
diff --git a/llvm/include/llvm/MC/MCAsmInfo.h b/llvm/include/llvm/MC/MCAsmInfo.h
index ccb7c524d45f8d..cf31c36cc4cef8 100644
--- a/llvm/include/llvm/MC/MCAsmInfo.h
+++ b/llvm/include/llvm/MC/MCAsmInfo.h
@@ -484,7 +484,7 @@ class MCAsmInfo {
   /// The integrated assembler should be enabled by default (by the
   /// constructors) when failing to parse a valid piece of assembly (inline
   /// or otherwise) is considered a bug. It may then be overridden after
-  /// construction (see LLVMTargetMachine::initAsmInfo()).
+  /// construction (see CodeGenTargetMachineImpl::initAsmInfo()).
   bool UseIntegratedAssembler;
 
   /// Use AsmParser to parse inlineAsm when UseIntegratedAssembler is not set.
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index d04387535db0da..7fa6fa118fe551 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -443,7 +443,8 @@ template <typename DerivedT, typename TargetMachineT> class CodeGenPassBuilder {
   Error addFastRegAlloc(AddMachinePass &) const;
 
   /// addOptimizedRegAlloc - Add passes related to register allocation.
-  /// CodeGenCommonTMImpl provides standard regalloc passes for most targets.
+  /// CodeGenTargetMachineImpl provides standard regalloc passes for most
+  /// targets.
   void addOptimizedRegAlloc(AddMachinePass &) const;
 
   /// Add passes that optimize machine instructions after register allocation.
diff --git a/llvm/lib/Target/ARC/ARCTargetMachine.cpp b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
index df8c96a4d97935..57e0177cd37486 100644
--- a/llvm/lib/Target/ARC/ARCTargetMachine.cpp
+++ b/llvm/lib/Target/ARC/ARCTargetMachine.cpp
@@ -33,11 +33,12 @@ ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT,
                                    std::optional<Reloc::Model> RM,
                                    std::optional<CodeModel::Model> CM,
                                    CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T,
-                          "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
-                          "f32:32:32-i64:32-f64:32-a:0:32-n32",
-                          TT, CPU, FS, Options, getRelocModel(RM),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(
+          T,
+          "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
+          "f32:32:32-i64:32-f64:32-a:0:32-n32",
+          TT, CPU, FS, Options, getRelocModel(RM),
+          getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<TargetLoweringObjectFileELF>()),
       Subtarget(TT, std::string(CPU), std::string(FS), *this) {
   initAsmInfo();
diff --git a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
index c256bb2d6a4cdd..ae6ef89fdcd072 100644
--- a/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+++ b/llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
@@ -54,9 +54,9 @@ CSKYTargetMachine::CSKYTargetMachine(const Target &T, const Triple &TT,
                                      std::optional<Reloc::Model> RM,
                                      std::optional<CodeModel::Model> CM,
                                      CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT), TT, CPU, FS, Options,
-                          RM.value_or(Reloc::Static),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT), TT, CPU, FS, Options,
+                               RM.value_or(Reloc::Static),
+                               getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<CSKYELFTargetObjectFile>()) {
   initAsmInfo();
 }
diff --git a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
index 914aee4f8b4b9d..655427a3e80209 100644
--- a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
+++ b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
@@ -108,7 +108,7 @@ DirectXTargetMachine::DirectXTargetMachine(const Target &T, const Triple &TT,
                                            std::optional<Reloc::Model> RM,
                                            std::optional<CodeModel::Model> CM,
                                            CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(
+    : CodeGenTargetMachineImpl(
           T,
           "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-"
           "f32:32-f64:64-n8:16:32:64",
diff --git a/llvm/lib/Target/M68k/M68kTargetMachine.cpp b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
index ce5970c5ec95da..2f5a2e8288a261 100644
--- a/llvm/lib/Target/M68k/M68kTargetMachine.cpp
+++ b/llvm/lib/Target/M68k/M68kTargetMachine.cpp
@@ -100,9 +100,9 @@ M68kTargetMachine::M68kTargetMachine(const Target &T, const Triple &TT,
                                      std::optional<Reloc::Model> RM,
                                      std::optional<CodeModel::Model> CM,
                                      CodeGenOptLevel OL, bool JIT)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
-                          Options, getEffectiveRelocModel(TT, RM),
-                          ::getEffectiveCodeModel(CM, JIT), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options), TT, CPU,
+                               FS, Options, getEffectiveRelocModel(TT, RM),
+                               ::getEffectiveCodeModel(CM, JIT), OL),
       TLOF(std::make_unique<M68kELFTargetObjectFile>()),
       Subtarget(TT, CPU, FS, *this) {
   initAsmInfo();
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index a388b44b3ac837..e547e62094404f 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -805,8 +805,8 @@ MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
   ELFObjectWriter &W = getStreamer().getWriter();
 
   // It's possible that MCObjectFileInfo isn't fully initialized at this point
-  // due to an initialization order problem where CodeGenCommonTMImpl creates
-  // the target streamer before TargetLoweringObjectFile calls
+  // due to an initialization order problem where CodeGenTargetMachineImpl
+  // creates the target streamer before TargetLoweringObjectFile calls
   // InitializeMCObjectFileInfo. There doesn't seem to be a single place that
   // covers all cases so this statement covers most cases and direct object
   // emission must call setPic() once MCObjectFileInfo has been initialized. The
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 1f6866383e6067..2b64ab9aa6973d 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -345,8 +345,8 @@ static ScheduleDAGInstrs *createPPCPostMachineScheduler(
 
 // The FeatureString here is a little subtle. We are modifying the feature
 // string with what are (currently) non-function specific overrides as it goes
-// into the CodeGenCommonTMImpl constructor and then using the stored value in
-// the Subtarget constructor below it.
+// into the CodeGenTargetMachineImpl constructor and then using the stored value
+// in the Subtarget constructor below it.
 PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
                                    StringRef CPU, StringRef FS,
                                    const TargetOptions &Options,
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
index 75b622046a6307..e8eeb85647b83f 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h
@@ -44,7 +44,7 @@ class SystemZTargetMachine : public CodeGenTargetMachineImpl {
   // attributes of each function.
   const SystemZSubtarget *getSubtargetImpl() const = delete;
 
-  // Override LLVMTargetMachine
+  // Override CodeGenTargetMachineImpl
   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
   TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
 
diff --git a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
index 7fb998d615c464..634ada375a3dc1 100644
--- a/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
@@ -50,9 +50,10 @@ XtensaTargetMachine::XtensaTargetMachine(const Target &T, const Triple &TT,
                                          std::optional<CodeModel::Model> CM,
                                          CodeGenOptLevel OL, bool JIT,
                                          bool IsLittle)
-    : CodeGenCommonTMImpl(T, computeDataLayout(TT, CPU, Options, IsLittle), TT,
-                          CPU, FS, Options, getEffectiveRelocModel(JIT, RM),
-                          getEffectiveCodeModel(CM, CodeModel::Small), OL),
+    : CodeGenTargetMachineImpl(T, computeDataLayout(TT, CPU, Options, IsLittle),
+                               TT, CPU, FS, Options,
+                               getEffectiveRelocModel(JIT, RM),
+                               getEffectiveCodeModel(CM, CodeModel::Small), OL),
       TLOF(std::make_unique<TargetLoweringObjectFileELF>()) {
   initAsmInfo();
 }

Fixed un-renamed CodeGenTargetMachineImpl inheritances in the experim…

5d1bdda

…ental targets.

matinraayai mentioned this pull request Nov 14, 2024

Overhaul the TargetMachine and LLVMTargetMachine Classes #111234

Merged

Comment clang format fix.

80fc63a

arsenm approved these changes Nov 14, 2024

View reviewed changes

Replaced any mention of LLVMTargetMachine in comments to CodeGenTarge…

83b8aa6

…tMachineImpl.

matinraayai requested a review from arsenm November 14, 2024 23:29

bogner approved these changes Nov 15, 2024

View reviewed changes

llvm-beanz approved these changes Nov 15, 2024

View reviewed changes

bogner merged commit eec21cc into llvm:main Nov 15, 2024
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llvmbot added backend:PowerPC backend:SystemZ backend:m68k backend:DirectX labels Nov 16, 2024

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Fixed un-renamed CodeGenTargetMachineImpl Intheritances in Experimental Targets #116290

Fixed un-renamed CodeGenTargetMachineImpl Intheritances in Experimental Targets #116290

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Fixed un-renamed CodeGenTargetMachineImpl Intheritances in Experimental Targets #116290

Fixed un-renamed CodeGenTargetMachineImpl Intheritances in Experimental Targets #116290

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