[CodeGen][NewPM] Port RegAllocGreedy to NPM #119540
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@llvm/pr-subscribers-llvm-regalloc Author: Akshat Oke (optimisan) ChangesPatch is 34.49 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/119540.diff 20 Files Affected:
diff --git a/llvm/lib/CodeGen/InterferenceCache.h b/llvm/include/llvm/CodeGen/InterferenceCache.h
similarity index 95%
rename from llvm/lib/CodeGen/InterferenceCache.h
rename to llvm/include/llvm/CodeGen/InterferenceCache.h
index 2a176b4f2cf7b1..dfe82916224913 100644
--- a/llvm/lib/CodeGen/InterferenceCache.h
+++ b/llvm/include/llvm/CodeGen/InterferenceCache.h
@@ -142,7 +142,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
// Point to an entry for each physreg. The entry pointed to may not be up to
// date, and it may have been reused for a different physreg.
- unsigned char* PhysRegEntries = nullptr;
+ unsigned char *PhysRegEntries = nullptr;
size_t PhysRegEntriesCount = 0;
// Next round-robin entry to be picked.
@@ -158,9 +158,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
InterferenceCache() = default;
InterferenceCache &operator=(const InterferenceCache &other) = delete;
InterferenceCache(const InterferenceCache &other) = delete;
- ~InterferenceCache() {
- free(PhysRegEntries);
- }
+ ~InterferenceCache() { free(PhysRegEntries); }
void reinitPhysRegEntries();
@@ -194,9 +192,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
/// Cursor - Create a dangling cursor.
Cursor() = default;
- Cursor(const Cursor &O) {
- setEntry(O.CacheEntry);
- }
+ Cursor(const Cursor &O) { setEntry(O.CacheEntry); }
Cursor &operator=(const Cursor &O) {
setEntry(O.CacheEntry);
@@ -220,21 +216,15 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
}
/// hasInterference - Return true if the current block has any interference.
- bool hasInterference() {
- return Current->First.isValid();
- }
+ bool hasInterference() { return Current->First.isValid(); }
/// first - Return the starting index of the first interfering range in the
/// current block.
- SlotIndex first() {
- return Current->First;
- }
+ SlotIndex first() { return Current->First; }
/// last - Return the ending index of the last interfering range in the
/// current block.
- SlotIndex last() {
- return Current->Last;
- }
+ SlotIndex last() { return Current->Last; }
};
};
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h
index 547cc26eda2295..ceb0fec3b6086f 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -900,6 +900,7 @@ class LLVM_ABI MachineFunction {
/// Run the current MachineFunction through the machine code verifier, useful
/// for debugger use.
+ /// TODO: Add the param LiveStks
/// \returns true if no problems were found.
bool verify(LiveIntervals *LiveInts, SlotIndexes *Indexes,
const char *Banner = nullptr, raw_ostream *OS = nullptr,
diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h
index d1fac4a304cffe..1096c34b307f9b 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -167,7 +167,7 @@ namespace llvm {
extern char &LiveRangeShrinkID;
/// Greedy register allocator.
- extern char &RAGreedyID;
+ extern char &RAGreedyLegacyID;
/// Basic register allocator.
extern char &RABasicID;
diff --git a/llvm/lib/CodeGen/RegAllocBase.h b/llvm/include/llvm/CodeGen/RegAllocBase.h
similarity index 99%
rename from llvm/lib/CodeGen/RegAllocBase.h
rename to llvm/include/llvm/CodeGen/RegAllocBase.h
index a1ede08a15356d..4adfdcd866f892 100644
--- a/llvm/lib/CodeGen/RegAllocBase.h
+++ b/llvm/include/llvm/CodeGen/RegAllocBase.h
@@ -48,7 +48,7 @@ class LiveIntervals;
class LiveRegMatrix;
class MachineInstr;
class MachineRegisterInfo;
-template<typename T> class SmallVectorImpl;
+template <typename T> class SmallVectorImpl;
class Spiller;
class TargetRegisterInfo;
class VirtRegMap;
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.h b/llvm/include/llvm/CodeGen/RegAllocGreedy.h
similarity index 89%
rename from llvm/lib/CodeGen/RegAllocGreedy.h
rename to llvm/include/llvm/CodeGen/RegAllocGreedy.h
index 89ceefd37795bc..a20d29883bd10e 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.h
+++ b/llvm/include/llvm/CodeGen/RegAllocGreedy.h
@@ -12,9 +12,6 @@
#ifndef LLVM_CODEGEN_REGALLOCGREEDY_H_
#define LLVM_CODEGEN_REGALLOCGREEDY_H_
-#include "InterferenceCache.h"
-#include "RegAllocBase.h"
-#include "SplitKit.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/IndexedMap.h"
@@ -22,16 +19,22 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/CalcSpillWeights.h"
+#include "llvm/CodeGen/InterferenceCache.h"
#include "llvm/CodeGen/LiveDebugVariables.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/LiveRangeEdit.h"
+#include "llvm/CodeGen/LiveStacks.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/RegAllocBase.h"
+#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
#include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/SpillPlacement.h"
#include "llvm/CodeGen/Spiller.h"
+#include "llvm/CodeGen/SplitKit.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
+#include "llvm/IR/PassManager.h"
#include <algorithm>
#include <cstdint>
#include <memory>
@@ -56,11 +59,30 @@ class SlotIndexes;
class TargetInstrInfo;
class VirtRegMap;
-class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
- public RegAllocBase,
+class LLVM_LIBRARY_VISIBILITY RAGreedy : public RegAllocBase,
private LiveRangeEdit::Delegate {
- // Interface to eviction advisers
public:
+ struct RequiredAnalyses {
+ VirtRegMap *VRM = nullptr;
+ LiveIntervals *LIS = nullptr;
+ LiveRegMatrix *LRM = nullptr;
+ SlotIndexes *Indexes = nullptr;
+ MachineBlockFrequencyInfo *MBFI = nullptr;
+ MachineDominatorTree *DomTree = nullptr;
+ MachineLoopInfo *Loops = nullptr;
+ MachineOptimizationRemarkEmitter *ORE = nullptr;
+ EdgeBundles *Bundles = nullptr;
+ SpillPlacement *SpillPlacer = nullptr;
+ LiveDebugVariables *DebugVars = nullptr;
+
+ // Used by InlineSpiller
+ LiveStacks *LSS;
+ // Proxies for eviction and priority advisors
+ RegAllocEvictionAdvisorProvider *EvictProvider;
+ RegAllocPriorityAdvisorProvider *PriorityProvider;
+ };
+
+ // Interface to eviction advisers
/// Track allocation stage and eviction loop prevention during allocation.
class ExtraRegInfo final {
// RegInfo - Keep additional information about each live range.
@@ -178,6 +200,10 @@ class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
EdgeBundles *Bundles = nullptr;
SpillPlacement *SpillPlacer = nullptr;
LiveDebugVariables *DebugVars = nullptr;
+ LiveStacks *LSS = nullptr; // Used by InlineSpiller
+ // Proxy for the advisors
+ RegAllocEvictionAdvisorProvider *EvictProvider = nullptr;
+ RegAllocPriorityAdvisorProvider *PriorityProvider = nullptr;
// state
std::unique_ptr<Spiller> SpillerInstance;
@@ -282,13 +308,11 @@ class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
public:
RAGreedy(const RegAllocFilterFunc F = nullptr);
+ // Evict and priority advisors use this object, so we can construct those
+ // first and pass them here.
+ // Not required once legacy PM is removed.
+ void setAnalyses(RequiredAnalyses &Analyses);
- /// Return the pass name.
- StringRef getPassName() const override { return "Greedy Register Allocator"; }
-
- /// RAGreedy analysis usage.
- void getAnalysisUsage(AnalysisUsage &AU) const override;
- void releaseMemory() override;
Spiller &spiller() override { return *SpillerInstance; }
void enqueueImpl(const LiveInterval *LI) override;
const LiveInterval *dequeue() override;
@@ -297,19 +321,9 @@ class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
void aboutToRemoveInterval(const LiveInterval &) override;
/// Perform register allocation.
- bool runOnMachineFunction(MachineFunction &mf) override;
-
- MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoPHIs);
- }
-
- MachineFunctionProperties getClearedProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::IsSSA);
- }
+ bool run(MachineFunction &mf);
- static char ID;
+ void releaseMemory();
private:
MCRegister selectOrSplitImpl(const LiveInterval &,
@@ -451,5 +465,23 @@ class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
/// Report the statistic for each loop.
void reportStats();
};
+
+class RAGreedyPass : public PassInfoMixin<RAGreedyPass> {
+ RegAllocFilterFunc Filter;
+
+public:
+ RAGreedyPass(RegAllocFilterFunc F = nullptr) : Filter(F) {}
+ PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &AM);
+
+ MachineFunctionProperties getRequiredProperties() const {
+ return MachineFunctionProperties().set(
+ MachineFunctionProperties::Property::NoPHIs);
+ }
+
+ MachineFunctionProperties getClearedProperties() const {
+ return MachineFunctionProperties().set(
+ MachineFunctionProperties::Property::IsSSA);
+ }
+};
} // namespace llvm
#endif // #ifndef LLVM_CODEGEN_REGALLOCGREEDY_H_
diff --git a/llvm/lib/CodeGen/SplitKit.h b/llvm/include/llvm/CodeGen/SplitKit.h
similarity index 97%
rename from llvm/lib/CodeGen/SplitKit.h
rename to llvm/include/llvm/CodeGen/SplitKit.h
index cc277ecc0e882b..50b63b9aa2a858 100644
--- a/llvm/lib/CodeGen/SplitKit.h
+++ b/llvm/include/llvm/CodeGen/SplitKit.h
@@ -88,7 +88,6 @@ class LLVM_LIBRARY_VISIBILITY InsertPointAnalysis {
}
return Res;
}
-
};
/// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
@@ -387,7 +386,7 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
/// removeBackCopies - Remove the copy instructions that defines the values
/// in the vector in the complement interval.
- void removeBackCopies(SmallVectorImpl<VNInfo*> &Copies);
+ void removeBackCopies(SmallVectorImpl<VNInfo *> &Copies);
/// getShallowDominator - Returns the least busy dominator of MBB that is
/// also dominated by DefMBB. Busy is measured by loop depth.
@@ -430,8 +429,9 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
/// \p InsertBefore. This can be invoked with a \p LaneMask which may make it
/// necessary to construct a sequence of copies to cover it exactly.
SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
- MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore,
- bool Late, unsigned RegIdx);
+ MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator InsertBefore, bool Late,
+ unsigned RegIdx);
SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg,
MachineBasicBlock &MB,
@@ -448,7 +448,7 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
VirtRegAuxInfo &VRAI);
/// reset - Prepare for a new split.
- void reset(LiveRangeEdit&, ComplementSpillMode = SM_Partition);
+ void reset(LiveRangeEdit &, ComplementSpillMode = SM_Partition);
/// Create a new virtual register and live interval.
/// Return the interval index, starting from 1. Interval index 0 is the
@@ -533,9 +533,9 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
/// @param LeaveBefore When set, leave IntvIn before this point.
/// @param IntvOut Interval index leaving the block.
/// @param EnterAfter When set, enter IntvOut after this point.
- void splitLiveThroughBlock(unsigned MBBNum,
- unsigned IntvIn, SlotIndex LeaveBefore,
- unsigned IntvOut, SlotIndex EnterAfter);
+ void splitLiveThroughBlock(unsigned MBBNum, unsigned IntvIn,
+ SlotIndex LeaveBefore, unsigned IntvOut,
+ SlotIndex EnterAfter);
/// splitRegInBlock - Split CurLI in the given block such that it enters the
/// block in IntvIn and leaves it on the stack (or not at all). Split points
@@ -545,8 +545,8 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
/// @param BI Block descriptor.
/// @param IntvIn Interval index entering the block. Not 0.
/// @param LeaveBefore When set, leave IntvIn before this point.
- void splitRegInBlock(const SplitAnalysis::BlockInfo &BI,
- unsigned IntvIn, SlotIndex LeaveBefore);
+ void splitRegInBlock(const SplitAnalysis::BlockInfo &BI, unsigned IntvIn,
+ SlotIndex LeaveBefore);
/// splitRegOutBlock - Split CurLI in the given block such that it enters the
/// block on the stack (or isn't live-in at all) and leaves it in IntvOut.
@@ -557,8 +557,8 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
/// @param BI Block descriptor.
/// @param IntvOut Interval index leaving the block.
/// @param EnterAfter When set, enter IntvOut after this point.
- void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI,
- unsigned IntvOut, SlotIndex EnterAfter);
+ void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI, unsigned IntvOut,
+ SlotIndex EnterAfter);
};
} // end namespace llvm
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 87faf111a30cc9..1ab0ae27d54663 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -249,7 +249,7 @@ void initializeProfileSummaryInfoWrapperPassPass(PassRegistry &);
void initializePromoteLegacyPassPass(PassRegistry &);
void initializeRABasicPass(PassRegistry &);
void initializePseudoProbeInserterPass(PassRegistry &);
-void initializeRAGreedyPass(PassRegistry &);
+void initializeRAGreedyLegacyPass(PassRegistry &);
void initializeReachingDefAnalysisPass(PassRegistry &);
void initializeReassociateLegacyPassPass(PassRegistry &);
void initializeRegAllocEvictionAdvisorAnalysisLegacyPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index c23e4af1a342bd..bf12a2c9aca90b 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -187,6 +187,15 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
return parseRegAllocFastPassOptions(*PB, Params);
},
"filter=reg-filter;no-clear-vregs")
+
+MACHINE_FUNCTION_PASS_WITH_PARAMS(
+ "regallocgreedy", "RAGreedy",
+ [](RegAllocFilterFunc F) { return RAGreedyPass(F); },
+ [PB = this](StringRef Params) {
+ // TODO: parseRegAllocFilter(*PB, Params);
+ return Expected<RegAllocFilterFunc>(nullptr);
+ }, ""
+)
#undef MACHINE_FUNCTION_PASS_WITH_PARAMS
// After a pass is converted to new pass manager, its entry should be moved from
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 8efe540770913a..6acff9cd21134b 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -111,7 +111,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializePreISelIntrinsicLoweringLegacyPassPass(Registry);
initializeProcessImplicitDefsPass(Registry);
initializeRABasicPass(Registry);
- initializeRAGreedyPass(Registry);
+ initializeRAGreedyLegacyPass(Registry);
initializeRegAllocFastPass(Registry);
initializeRegUsageInfoCollectorLegacyPass(Registry);
initializeRegUsageInfoPropagationLegacyPass(Registry);
diff --git a/llvm/lib/CodeGen/InlineSpiller.cpp b/llvm/lib/CodeGen/InlineSpiller.cpp
index b9768d5c63a5d1..fedf15f86b6ba2 100644
--- a/llvm/lib/CodeGen/InlineSpiller.cpp
+++ b/llvm/lib/CodeGen/InlineSpiller.cpp
@@ -11,7 +11,6 @@
//
//===----------------------------------------------------------------------===//
-#include "SplitKit.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/MapVector.h"
@@ -36,6 +35,7 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/CodeGen/Spiller.h"
+#include "llvm/CodeGen/SplitKit.h"
#include "llvm/CodeGen/StackMaps.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
diff --git a/llvm/lib/CodeGen/InterferenceCache.cpp b/llvm/lib/CodeGen/InterferenceCache.cpp
index 73cde07cfd51a9..1455bb05e468c0 100644
--- a/llvm/lib/CodeGen/InterferenceCache.cpp
+++ b/llvm/lib/CodeGen/InterferenceCache.cpp
@@ -10,7 +10,7 @@
//
//===----------------------------------------------------------------------===//
-#include "InterferenceCache.h"
+#include "llvm/CodeGen/InterferenceCache.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
diff --git a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
index 5989d980eb4f44..f71a5ffb96f5f8 100644
--- a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
+++ b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
@@ -11,11 +11,11 @@
//===----------------------------------------------------------------------===//
#include "AllocationOrder.h"
-#include "RegAllocGreedy.h"
#include "llvm/Analysis/InteractiveModelRunner.h"
#include "llvm/Analysis/MLModelRunner.h"
#include "llvm/Analysis/TensorSpec.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
+#include "llvm/CodeGen/RegAllocGreedy.h"
#if defined(LLVM_HAVE_TF_AOT_REGALLOCEVICTMODEL) || defined(LLVM_HAVE_TFLITE)
#include "llvm/Analysis/ModelUnderTrainingRunner.h"
#include "llvm/Analysis/NoInferenceModelRunner.h"
diff --git a/llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
index dd598767f1bbc2..1bbd0ec2a73be0 100644
--- a/llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
+++ b/llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
@@ -11,7 +11,6 @@
//===----------------------------------------------------------------------===//
#include "AllocationOrder.h"
-#include "RegAllocGreedy.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/InteractiveModelRunner.h"
#include "llvm/Analysis/MLModelRunner.h"
@@ -24,6 +23,7 @@
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/RegAllocGreedy.h"
#include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/SlotIndexes.h"
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp b/llvm/lib/CodeGen/RegAllocBase.cpp
index 449033d6321003..6a98b27026f786 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -11,7 +11,7 @@
//
//===----------------------------------------------------------------------===//
-#include "RegAllocBase.h"
+#include "llvm/CodeGen/RegAllocBase.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/LiveInterval.h"
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
index f3f34f890be11e..66fd7693f7615d 100644
--- a/llvm/lib/CodeGen/RegAllocBasic.cpp
+++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
@@ -12,7 +12,6 @@
//===----------------------------------------------------------------------===//
#include "AllocationOrder.h"
-#include "RegAllocBase.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/ProfileSummaryInfo.h"
#include "llvm/CodeGen/CalcSpillWeights.h"
@@ -26,6 +25,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/RegAllocBase.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/CodeGen/Spiller.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
diff --git a/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp b/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
index 7e93bebed73bb7..f6f09a0e3c07e1 100644
--- a/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
+++ b/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
@@ -11,11 +11,11 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
#include "AllocationOrder.h"
-#include "RegAll...
[truncated]
|
|
@llvm/pr-subscribers-mlgo Author: Akshat Oke (optimisan) ChangesPatch is 34.49 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/119540.diff 20 Files Affected:
diff --git a/llvm/lib/CodeGen/InterferenceCache.h b/llvm/include/llvm/CodeGen/InterferenceCache.h
similarity index 95%
rename from llvm/lib/CodeGen/InterferenceCache.h
rename to llvm/include/llvm/CodeGen/InterferenceCache.h
index 2a176b4f2cf7b1..dfe82916224913 100644
--- a/llvm/lib/CodeGen/InterferenceCache.h
+++ b/llvm/include/llvm/CodeGen/InterferenceCache.h
@@ -142,7 +142,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
// Point to an entry for each physreg. The entry pointed to may not be up to
// date, and it may have been reused for a different physreg.
- unsigned char* PhysRegEntries = nullptr;
+ unsigned char *PhysRegEntries = nullptr;
size_t PhysRegEntriesCount = 0;
// Next round-robin entry to be picked.
@@ -158,9 +158,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
InterferenceCache() = default;
InterferenceCache &operator=(const InterferenceCache &other) = delete;
InterferenceCache(const InterferenceCache &other) = delete;
- ~InterferenceCache() {
- free(PhysRegEntries);
- }
+ ~InterferenceCache() { free(PhysRegEntries); }
void reinitPhysRegEntries();
@@ -194,9 +192,7 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
/// Cursor - Create a dangling cursor.
Cursor() = default;
- Cursor(const Cursor &O) {
- setEntry(O.CacheEntry);
- }
+ Cursor(const Cursor &O) { setEntry(O.CacheEntry); }
Cursor &operator=(const Cursor &O) {
setEntry(O.CacheEntry);
@@ -220,21 +216,15 @@ class LLVM_LIBRARY_VISIBILITY InterferenceCache {
}
/// hasInterference - Return true if the current block has any interference.
- bool hasInterference() {
- return Current->First.isValid();
- }
+ bool hasInterference() { return Current->First.isValid(); }
/// first - Return the starting index of the first interfering range in the
/// current block.
- SlotIndex first() {
- return Current->First;
- }
+ SlotIndex first() { return Current->First; }
/// last - Return the ending index of the last interfering range in the
/// current block.
- SlotIndex last() {
- return Current->Last;
- }
+ SlotIndex last() { return Current->Last; }
};
};
diff --git a/llvm/include/llvm/CodeGen/MachineFunction.h b/llvm/include/llvm/CodeGen/MachineFunction.h
index 547cc26eda2295..ceb0fec3b6086f 100644
--- a/llvm/include/llvm/CodeGen/MachineFunction.h
+++ b/llvm/include/llvm/CodeGen/MachineFunction.h
@@ -900,6 +900,7 @@ class LLVM_ABI MachineFunction {
/// Run the current MachineFunction through the machine code verifier, useful
/// for debugger use.
+ /// TODO: Add the param LiveStks
/// \returns true if no problems were found.
bool verify(LiveIntervals *LiveInts, SlotIndexes *Indexes,
const char *Banner = nullptr, raw_ostream *OS = nullptr,
diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h
index d1fac4a304cffe..1096c34b307f9b 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -167,7 +167,7 @@ namespace llvm {
extern char &LiveRangeShrinkID;
/// Greedy register allocator.
- extern char &RAGreedyID;
+ extern char &RAGreedyLegacyID;
/// Basic register allocator.
extern char &RABasicID;
diff --git a/llvm/lib/CodeGen/RegAllocBase.h b/llvm/include/llvm/CodeGen/RegAllocBase.h
similarity index 99%
rename from llvm/lib/CodeGen/RegAllocBase.h
rename to llvm/include/llvm/CodeGen/RegAllocBase.h
index a1ede08a15356d..4adfdcd866f892 100644
--- a/llvm/lib/CodeGen/RegAllocBase.h
+++ b/llvm/include/llvm/CodeGen/RegAllocBase.h
@@ -48,7 +48,7 @@ class LiveIntervals;
class LiveRegMatrix;
class MachineInstr;
class MachineRegisterInfo;
-template<typename T> class SmallVectorImpl;
+template <typename T> class SmallVectorImpl;
class Spiller;
class TargetRegisterInfo;
class VirtRegMap;
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.h b/llvm/include/llvm/CodeGen/RegAllocGreedy.h
similarity index 89%
rename from llvm/lib/CodeGen/RegAllocGreedy.h
rename to llvm/include/llvm/CodeGen/RegAllocGreedy.h
index 89ceefd37795bc..a20d29883bd10e 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.h
+++ b/llvm/include/llvm/CodeGen/RegAllocGreedy.h
@@ -12,9 +12,6 @@
#ifndef LLVM_CODEGEN_REGALLOCGREEDY_H_
#define LLVM_CODEGEN_REGALLOCGREEDY_H_
-#include "InterferenceCache.h"
-#include "RegAllocBase.h"
-#include "SplitKit.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/IndexedMap.h"
@@ -22,16 +19,22 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/CalcSpillWeights.h"
+#include "llvm/CodeGen/InterferenceCache.h"
#include "llvm/CodeGen/LiveDebugVariables.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/LiveRangeEdit.h"
+#include "llvm/CodeGen/LiveStacks.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/RegAllocBase.h"
+#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
#include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/SpillPlacement.h"
#include "llvm/CodeGen/Spiller.h"
+#include "llvm/CodeGen/SplitKit.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
+#include "llvm/IR/PassManager.h"
#include <algorithm>
#include <cstdint>
#include <memory>
@@ -56,11 +59,30 @@ class SlotIndexes;
class TargetInstrInfo;
class VirtRegMap;
-class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
- public RegAllocBase,
+class LLVM_LIBRARY_VISIBILITY RAGreedy : public RegAllocBase,
private LiveRangeEdit::Delegate {
- // Interface to eviction advisers
public:
+ struct RequiredAnalyses {
+ VirtRegMap *VRM = nullptr;
+ LiveIntervals *LIS = nullptr;
+ LiveRegMatrix *LRM = nullptr;
+ SlotIndexes *Indexes = nullptr;
+ MachineBlockFrequencyInfo *MBFI = nullptr;
+ MachineDominatorTree *DomTree = nullptr;
+ MachineLoopInfo *Loops = nullptr;
+ MachineOptimizationRemarkEmitter *ORE = nullptr;
+ EdgeBundles *Bundles = nullptr;
+ SpillPlacement *SpillPlacer = nullptr;
+ LiveDebugVariables *DebugVars = nullptr;
+
+ // Used by InlineSpiller
+ LiveStacks *LSS;
+ // Proxies for eviction and priority advisors
+ RegAllocEvictionAdvisorProvider *EvictProvider;
+ RegAllocPriorityAdvisorProvider *PriorityProvider;
+ };
+
+ // Interface to eviction advisers
/// Track allocation stage and eviction loop prevention during allocation.
class ExtraRegInfo final {
// RegInfo - Keep additional information about each live range.
@@ -178,6 +200,10 @@ class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
EdgeBundles *Bundles = nullptr;
SpillPlacement *SpillPlacer = nullptr;
LiveDebugVariables *DebugVars = nullptr;
+ LiveStacks *LSS = nullptr; // Used by InlineSpiller
+ // Proxy for the advisors
+ RegAllocEvictionAdvisorProvider *EvictProvider = nullptr;
+ RegAllocPriorityAdvisorProvider *PriorityProvider = nullptr;
// state
std::unique_ptr<Spiller> SpillerInstance;
@@ -282,13 +308,11 @@ class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
public:
RAGreedy(const RegAllocFilterFunc F = nullptr);
+ // Evict and priority advisors use this object, so we can construct those
+ // first and pass them here.
+ // Not required once legacy PM is removed.
+ void setAnalyses(RequiredAnalyses &Analyses);
- /// Return the pass name.
- StringRef getPassName() const override { return "Greedy Register Allocator"; }
-
- /// RAGreedy analysis usage.
- void getAnalysisUsage(AnalysisUsage &AU) const override;
- void releaseMemory() override;
Spiller &spiller() override { return *SpillerInstance; }
void enqueueImpl(const LiveInterval *LI) override;
const LiveInterval *dequeue() override;
@@ -297,19 +321,9 @@ class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
void aboutToRemoveInterval(const LiveInterval &) override;
/// Perform register allocation.
- bool runOnMachineFunction(MachineFunction &mf) override;
-
- MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::NoPHIs);
- }
-
- MachineFunctionProperties getClearedProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::IsSSA);
- }
+ bool run(MachineFunction &mf);
- static char ID;
+ void releaseMemory();
private:
MCRegister selectOrSplitImpl(const LiveInterval &,
@@ -451,5 +465,23 @@ class LLVM_LIBRARY_VISIBILITY RAGreedy : public MachineFunctionPass,
/// Report the statistic for each loop.
void reportStats();
};
+
+class RAGreedyPass : public PassInfoMixin<RAGreedyPass> {
+ RegAllocFilterFunc Filter;
+
+public:
+ RAGreedyPass(RegAllocFilterFunc F = nullptr) : Filter(F) {}
+ PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &AM);
+
+ MachineFunctionProperties getRequiredProperties() const {
+ return MachineFunctionProperties().set(
+ MachineFunctionProperties::Property::NoPHIs);
+ }
+
+ MachineFunctionProperties getClearedProperties() const {
+ return MachineFunctionProperties().set(
+ MachineFunctionProperties::Property::IsSSA);
+ }
+};
} // namespace llvm
#endif // #ifndef LLVM_CODEGEN_REGALLOCGREEDY_H_
diff --git a/llvm/lib/CodeGen/SplitKit.h b/llvm/include/llvm/CodeGen/SplitKit.h
similarity index 97%
rename from llvm/lib/CodeGen/SplitKit.h
rename to llvm/include/llvm/CodeGen/SplitKit.h
index cc277ecc0e882b..50b63b9aa2a858 100644
--- a/llvm/lib/CodeGen/SplitKit.h
+++ b/llvm/include/llvm/CodeGen/SplitKit.h
@@ -88,7 +88,6 @@ class LLVM_LIBRARY_VISIBILITY InsertPointAnalysis {
}
return Res;
}
-
};
/// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
@@ -387,7 +386,7 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
/// removeBackCopies - Remove the copy instructions that defines the values
/// in the vector in the complement interval.
- void removeBackCopies(SmallVectorImpl<VNInfo*> &Copies);
+ void removeBackCopies(SmallVectorImpl<VNInfo *> &Copies);
/// getShallowDominator - Returns the least busy dominator of MBB that is
/// also dominated by DefMBB. Busy is measured by loop depth.
@@ -430,8 +429,9 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
/// \p InsertBefore. This can be invoked with a \p LaneMask which may make it
/// necessary to construct a sequence of copies to cover it exactly.
SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
- MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore,
- bool Late, unsigned RegIdx);
+ MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator InsertBefore, bool Late,
+ unsigned RegIdx);
SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg,
MachineBasicBlock &MB,
@@ -448,7 +448,7 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
VirtRegAuxInfo &VRAI);
/// reset - Prepare for a new split.
- void reset(LiveRangeEdit&, ComplementSpillMode = SM_Partition);
+ void reset(LiveRangeEdit &, ComplementSpillMode = SM_Partition);
/// Create a new virtual register and live interval.
/// Return the interval index, starting from 1. Interval index 0 is the
@@ -533,9 +533,9 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
/// @param LeaveBefore When set, leave IntvIn before this point.
/// @param IntvOut Interval index leaving the block.
/// @param EnterAfter When set, enter IntvOut after this point.
- void splitLiveThroughBlock(unsigned MBBNum,
- unsigned IntvIn, SlotIndex LeaveBefore,
- unsigned IntvOut, SlotIndex EnterAfter);
+ void splitLiveThroughBlock(unsigned MBBNum, unsigned IntvIn,
+ SlotIndex LeaveBefore, unsigned IntvOut,
+ SlotIndex EnterAfter);
/// splitRegInBlock - Split CurLI in the given block such that it enters the
/// block in IntvIn and leaves it on the stack (or not at all). Split points
@@ -545,8 +545,8 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
/// @param BI Block descriptor.
/// @param IntvIn Interval index entering the block. Not 0.
/// @param LeaveBefore When set, leave IntvIn before this point.
- void splitRegInBlock(const SplitAnalysis::BlockInfo &BI,
- unsigned IntvIn, SlotIndex LeaveBefore);
+ void splitRegInBlock(const SplitAnalysis::BlockInfo &BI, unsigned IntvIn,
+ SlotIndex LeaveBefore);
/// splitRegOutBlock - Split CurLI in the given block such that it enters the
/// block on the stack (or isn't live-in at all) and leaves it in IntvOut.
@@ -557,8 +557,8 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor {
/// @param BI Block descriptor.
/// @param IntvOut Interval index leaving the block.
/// @param EnterAfter When set, enter IntvOut after this point.
- void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI,
- unsigned IntvOut, SlotIndex EnterAfter);
+ void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI, unsigned IntvOut,
+ SlotIndex EnterAfter);
};
} // end namespace llvm
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 87faf111a30cc9..1ab0ae27d54663 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -249,7 +249,7 @@ void initializeProfileSummaryInfoWrapperPassPass(PassRegistry &);
void initializePromoteLegacyPassPass(PassRegistry &);
void initializeRABasicPass(PassRegistry &);
void initializePseudoProbeInserterPass(PassRegistry &);
-void initializeRAGreedyPass(PassRegistry &);
+void initializeRAGreedyLegacyPass(PassRegistry &);
void initializeReachingDefAnalysisPass(PassRegistry &);
void initializeReassociateLegacyPassPass(PassRegistry &);
void initializeRegAllocEvictionAdvisorAnalysisLegacyPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index c23e4af1a342bd..bf12a2c9aca90b 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -187,6 +187,15 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
return parseRegAllocFastPassOptions(*PB, Params);
},
"filter=reg-filter;no-clear-vregs")
+
+MACHINE_FUNCTION_PASS_WITH_PARAMS(
+ "regallocgreedy", "RAGreedy",
+ [](RegAllocFilterFunc F) { return RAGreedyPass(F); },
+ [PB = this](StringRef Params) {
+ // TODO: parseRegAllocFilter(*PB, Params);
+ return Expected<RegAllocFilterFunc>(nullptr);
+ }, ""
+)
#undef MACHINE_FUNCTION_PASS_WITH_PARAMS
// After a pass is converted to new pass manager, its entry should be moved from
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 8efe540770913a..6acff9cd21134b 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -111,7 +111,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializePreISelIntrinsicLoweringLegacyPassPass(Registry);
initializeProcessImplicitDefsPass(Registry);
initializeRABasicPass(Registry);
- initializeRAGreedyPass(Registry);
+ initializeRAGreedyLegacyPass(Registry);
initializeRegAllocFastPass(Registry);
initializeRegUsageInfoCollectorLegacyPass(Registry);
initializeRegUsageInfoPropagationLegacyPass(Registry);
diff --git a/llvm/lib/CodeGen/InlineSpiller.cpp b/llvm/lib/CodeGen/InlineSpiller.cpp
index b9768d5c63a5d1..fedf15f86b6ba2 100644
--- a/llvm/lib/CodeGen/InlineSpiller.cpp
+++ b/llvm/lib/CodeGen/InlineSpiller.cpp
@@ -11,7 +11,6 @@
//
//===----------------------------------------------------------------------===//
-#include "SplitKit.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/MapVector.h"
@@ -36,6 +35,7 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/CodeGen/Spiller.h"
+#include "llvm/CodeGen/SplitKit.h"
#include "llvm/CodeGen/StackMaps.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
diff --git a/llvm/lib/CodeGen/InterferenceCache.cpp b/llvm/lib/CodeGen/InterferenceCache.cpp
index 73cde07cfd51a9..1455bb05e468c0 100644
--- a/llvm/lib/CodeGen/InterferenceCache.cpp
+++ b/llvm/lib/CodeGen/InterferenceCache.cpp
@@ -10,7 +10,7 @@
//
//===----------------------------------------------------------------------===//
-#include "InterferenceCache.h"
+#include "llvm/CodeGen/InterferenceCache.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
diff --git a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
index 5989d980eb4f44..f71a5ffb96f5f8 100644
--- a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
+++ b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
@@ -11,11 +11,11 @@
//===----------------------------------------------------------------------===//
#include "AllocationOrder.h"
-#include "RegAllocGreedy.h"
#include "llvm/Analysis/InteractiveModelRunner.h"
#include "llvm/Analysis/MLModelRunner.h"
#include "llvm/Analysis/TensorSpec.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
+#include "llvm/CodeGen/RegAllocGreedy.h"
#if defined(LLVM_HAVE_TF_AOT_REGALLOCEVICTMODEL) || defined(LLVM_HAVE_TFLITE)
#include "llvm/Analysis/ModelUnderTrainingRunner.h"
#include "llvm/Analysis/NoInferenceModelRunner.h"
diff --git a/llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
index dd598767f1bbc2..1bbd0ec2a73be0 100644
--- a/llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
+++ b/llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
@@ -11,7 +11,6 @@
//===----------------------------------------------------------------------===//
#include "AllocationOrder.h"
-#include "RegAllocGreedy.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/InteractiveModelRunner.h"
#include "llvm/Analysis/MLModelRunner.h"
@@ -24,6 +23,7 @@
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/RegAllocGreedy.h"
#include "llvm/CodeGen/RegAllocPriorityAdvisor.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/SlotIndexes.h"
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp b/llvm/lib/CodeGen/RegAllocBase.cpp
index 449033d6321003..6a98b27026f786 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -11,7 +11,7 @@
//
//===----------------------------------------------------------------------===//
-#include "RegAllocBase.h"
+#include "llvm/CodeGen/RegAllocBase.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/LiveInterval.h"
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
index f3f34f890be11e..66fd7693f7615d 100644
--- a/llvm/lib/CodeGen/RegAllocBasic.cpp
+++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
@@ -12,7 +12,6 @@
//===----------------------------------------------------------------------===//
#include "AllocationOrder.h"
-#include "RegAllocBase.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/ProfileSummaryInfo.h"
#include "llvm/CodeGen/CalcSpillWeights.h"
@@ -26,6 +25,7 @@
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/RegAllocBase.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/CodeGen/Spiller.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
diff --git a/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp b/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
index 7e93bebed73bb7..f6f09a0e3c07e1 100644
--- a/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
+++ b/llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp
@@ -11,11 +11,11 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
#include "AllocationOrder.h"
-#include "RegAll...
[truncated]
|
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reviewed
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llvm/include/llvm/CodeGen/SplitKit.h
Outdated
| @@ -387,7 +386,7 @@ class LLVM_LIBRARY_VISIBILITY SplitEditor { | |||
|
|
|||
| /// removeBackCopies - Remove the copy instructions that defines the values | |||
| /// in the vector in the complement interval. | |||
| void removeBackCopies(SmallVectorImpl<VNInfo*> &Copies); | |||
| void removeBackCopies(SmallVectorImpl<VNInfo *> &Copies); | |||
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Pre-commit the clang-format changes first. There are similar changes in this file that are unrelated to this patch.
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These shouldn't happen anyway if you don't touch the lines. If you use git clang-format, it only changes areas touched by the changes
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I moved these files to include, so they got picked up by clang-format. I'll add a new PR.
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/51/builds/11516 Here is the relevant piece of the build log for the reference |
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/73/builds/13619 Here is the relevant piece of the build log for the reference |
|
@optimisan I've landed cdfcce4 to fix an unused variable warning from this PR. Thanks! |
|
Great, many thanks. |
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Leaving out NPM command line support for the next patch.