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AMDGPU: Scratch instructions are trivially disjoint from SMEM and buffer instructions #65287
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…fer instructions Scratch instructions are always in addrspace(5), which can only alias with flat (and itself). SMEM and buffer instructions can never reference those address spaces, so they are trivially disjoint.
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LGTM. Perhaps even better would be to use address space checks (addrspacesMayAlias).
} | ||
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if (isSMRD(MIa)) { | ||
if (isSMRD(MIb)) | ||
return checkInstOffsetsDoNotOverlap(MIa, MIb); | ||
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return !isFLAT(MIb) && !isMUBUF(MIb) && !isMTBUF(MIb); | ||
if (isFLAT(MIb)) | ||
return isFLATScratch(MIb); |
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This looks backwards?
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The function returns true if the instructions are trivially disjoint. SMRD is trivially disjoint from FLAT if it's FLAT-scratch, but not otherwise.
Part of the point of this is to avoid inspecting the MMO which isn't guaranteed to be there |
I know MMOs are allowed to be dropped, but in practice they rarely or never are, so I don't see the problem with relying on them for optimization. If we ever find that optimizations are missed because MMOs are dropped then that's just a QoI issue, and we can try to fix whatever pass dropped them. |
We can change that, someone just need to add a verifier check and fix where ever they are dropped |
Scratch instructions are always in addrspace(5), which can only alias with flat (and itself). SMEM and buffer instructions can never reference those address spaces, so they are trivially disjoint.