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release/18.x: [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (#83098) #86375

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Merged
merged 2 commits into from
Mar 27, 2024

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@llvmbot llvmbot commented Mar 23, 2024

Backport 3196005 6b70c5d

Requested by: @brad0

@llvmbot llvmbot added this to the LLVM 18.X Release milestone Mar 23, 2024
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llvmbot commented Mar 23, 2024

@kernigh What do you think about merging this PR to the release branch?

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LGTM

Chen Zheng and others added 2 commits March 27, 2024 16:07
Delete the code that skips the CFI for the condition register on ELF32.
The code checked !MustSaveCR, which happened only when
Subtarget.is32BitELFABI(), where spillCalleeSavedRegisters is spilling
cr in a different way. The spill was missing CFI. After deleting this
code, a spill of cr2 to cr4 gets CFI in the same way as a spill of r14
to r31.

Fixes llvm#83094

(cherry picked from commit 6b70c5d)
@tstellar tstellar merged commit e74c167 into llvm:release/18.x Mar 27, 2024
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Hi @brad0 (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix.

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4 participants