digitaldesign

Here are 9 public repositories matching this topic...

tharunchitipolu / RISC-V-32I-based-core-with-Advanced-Extensible-Interface

5 stage pipelined RISC-V core with AXI3 bus protocol between the directly mapped cache and main memory.

arm pipeline cache processor verilog systemverilog computer-architecture testbench verilog-hdl risc-v digitaldesign axi3

Updated Dec 21, 2024
Verilog

ahegazy / HDL

Star

This repository contains scripts that I create through my digital design course in Verilog, VHDL, SystemVerilog etc..

vhdl verilog systemverilog hdl digitaldesign

Updated Mar 16, 2020
Verilog

Abdelrahman-Adel610 / Full_AES-Verilog

Star

Full AES (Verilog)

aes-256 aes-128 aes-192 logica-de-programacao encryption-decryption digitaldesign

Updated May 15, 2024
Verilog

CipherX is a verification project for Advanced Encryption Standard (AES-128) using Universal Verification Methodology (UVM). It leverages Verilog, SystemVerilog, and Python to ensure robust encryption algorithm validation, integrating comprehensive UVM components and tests.

python security cryptography verification aes-128 verilog uvm cryptography-algorithms testing-framework digitaldesign encrytption dataencryption hardwareverification dataencryptionstandards

Updated Nov 16, 2024
Verilog

Harshal17S / car-parking-slot-management-using-fpga

Star

A car parking slot management system implemented using FPGA for efficient vehicle detection and slot allocation. Utilizes hardware-based logic for real-time monitoring and automation.

fpga verilog digitaldesign