Coroutine-Oriented Main-Memory Database Engine (VLDB 2021)
A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical path, as described by MICRO 2022 paper by Bera et al. (https://arxiv.org/pdf/2209.00188.pdf)
Development repository for Fetch Directed Instruction Prefetching (FDP) in gem5
Task-based framework for automatic synchronization and memory prefetching.
Instruction Pointer Classifier and Dynamic Degree Stream based Hardware Cache Prefetching
A data prefetching storage data plane for accelerating DL training performance.
A high-performance cache and memory hierarchy simulator built with modern C++17. Features configurable cache levels, advanced prefetching, MESI protocol, and detailed statistics. Ideal for computer architecture education, research, and performance analysis.
Task-based DBMS prototype using MxTasking and query compilation.
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