Skip to content

[LowerToHW] Remove PRINTF_FD macro #8432

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 4 commits into from
Apr 26, 2025
Merged

[LowerToHW] Remove PRINTF_FD macro #8432

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
4 commits
Select commit Hold shift + click to select a range
7d8e741
[LowerToHW] Remove PRINTF_FD macro
uenoku Apr 22, 2025
9f58106
Remove merge conflict
uenoku Apr 22, 2025
516770e
Merge branch 'main' into dev/hidetou/printf-fd
uenoku Apr 24, 2025
f27156e
Fixup test
uenoku Apr 25, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
21 changes: 4 additions & 17 deletions lib/Conversion/FIRRTLToHW/LowerToHW.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -922,18 +922,6 @@ endpackage
}

if (state.usedPrintf) {
b.create<sv::MacroDeclOp>("PRINTF_FD");
b.create<sv::MacroDeclOp>("PRINTF_FD_");
b.create<emit::FragmentOp>("PRINTF_FD_FRAGMENT", [&] {
b.create<sv::VerbatimOp>(
"\n// Users can define 'PRINTF_FD' to add a specified fd to "
"prints.");
emitGuard("PRINTF_FD_", [&]() {
emitGuardedDefine("PRINTF_FD", "PRINTF_FD_", "(`PRINTF_FD)",
"32'h80000002");
});
});

b.create<sv::MacroDeclOp>("PRINTF_COND");
b.create<sv::MacroDeclOp>("PRINTF_COND_");
b.create<emit::FragmentOp>("PRINTF_COND_FRAGMENT", [&] {
Expand Down Expand Up @@ -2655,13 +2643,12 @@ LogicalResult FIRRTLLowering::lowerStatementWithFd(
}

addIfProceduralBlock(ifCond, [&]() {
// Create a value specified by `PRINTF_FD` for printf, or the file
// descriptor opened using $fopen for fprintf.
// `fd`represents a file decriptor. Use the stdout or the one opened
// using $fopen.
Value fd;
if (fileDescriptor.isDefaultFd()) {
fd = builder.create<sv::MacroRefExprOp>(builder.getIntegerType(32),
"PRINTF_FD_");
circuitState.addFragment(theModule, "PRINTF_FD_FRAGMENT");
// Emit the sv.fwrite, writing to stderr by default.
fd = builder.create<hw::ConstantOp>(APInt(32, 0x80000002));
} else {
// Call the library function to get the FD.
auto fdOrError = callFileDescriptorLib(fileDescriptor);
Expand Down
6 changes: 3 additions & 3 deletions test/Conversion/FIRRTLToHW/lower-to-hw-module.mlir
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -71,9 +71,9 @@ firrtl.circuit "Simple" {
// CHECK: %myext.out = hw.instance "myext" @MyParameterizedExtModule<DEFAULT: i64 = 0, DEPTH: f64 = 3.242000e+01, FORMAT: none = "xyz_timeout=%d\0A", WIDTH: i8 = 32>(in: %reset: i1) -> (out: i8)
%myext:2 = firrtl.instance myext @MyParameterizedExtModule(in in: !firrtl.uint<1>, out out: !firrtl.uint<8>)

// CHECK: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32
// CHECK: sv.fwrite %PRINTF_FD_, "%x"(%xyz.out4) : i4
// CHECK: sv.fwrite %PRINTF_FD_, "Something interesting! %x"(%myext.out) : i8
// CHECK: %[[STDERR:.+]] = hw.constant -2147483646 : i32
// CHECK: sv.fwrite %[[STDERR]], "%x"(%xyz.out4) : i4
// CHECK: sv.fwrite %[[STDERR]], "Something interesting! %x"(%myext.out) : i8

firrtl.connect %myext#0, %reset : !firrtl.uint<1>, !firrtl.uint<1>

Expand Down
30 changes: 15 additions & 15 deletions test/Conversion/FIRRTLToHW/lower-to-hw.mlir
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -350,7 +350,7 @@ firrtl.circuit "Simple" attributes {annotations = [{class =
// printf(clock, reset, "Hi signed %d %0d\n", add(c, c), d)

// CHECK-LABEL: hw.module private @Print
// CHECK-SAME: attributes {emit.fragments = [@PRINTF_COND_FRAGMENT, @PRINTF_FD_FRAGMENT, @CIRCT_LIB_LOGGING_FRAGMENT]}
// CHECK-SAME: attributes {emit.fragments = [@PRINTF_COND_FRAGMENT, @CIRCT_LIB_LOGGING_FRAGMENT]}
firrtl.module private @Print(in %clock: !firrtl.clock, in %reset: !firrtl.uint<1>,
in %a: !firrtl.uint<4>, in %b: !firrtl.uint<4>,
in %c: !firrtl.sint<4>, in %d: !firrtl.sint<4>) {
Expand All @@ -365,47 +365,47 @@ firrtl.circuit "Simple" attributes {annotations = [{class =
// CHECK-NEXT: %[[PRINTF_COND:.+]] = sv.macro.ref.expr @PRINTF_COND_() : () -> i1
// CHECK-NEXT: [[AND:%.+]] = comb.and bin %[[PRINTF_COND]], %reset
// CHECK-NEXT: sv.if [[AND]] {
// CHECK-NEXT: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32
// CHECK-NEXT: sv.fwrite %PRINTF_FD_, "No operands and literal: %%\0A"
// CHECK-NEXT: %[[STDERR:.+]] = hw.constant -2147483646 : i32
// CHECK-NEXT: sv.fwrite %[[STDERR]], "No operands and literal: %%\0A"
// CHECK-NEXT: }
// CHECK-NEXT: %[[PRINTF_COND_:.+]] = sv.macro.ref.expr @PRINTF_COND_() : () -> i1
// CHECK-NEXT: [[AND:%.+]] = comb.and bin %[[PRINTF_COND_]], %reset : i1
// CHECK-NEXT: sv.if [[AND]] {
// CHECK-NEXT: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32
// CHECK-NEXT: sv.fwrite %PRINTF_FD_, "Binary: %b %0b %4b\0A"([[ADD]], %b, [[ADD]]) : i5, i4, i5
// CHECK-NEXT: %[[STDERR:.+]] = hw.constant -2147483646 : i32
// CHECK-NEXT: sv.fwrite %[[STDERR]], "Binary: %b %0b %4b\0A"([[ADD]], %b, [[ADD]]) : i5, i4, i5
// CHECK-NEXT: }
// CHECK-NEXT: %[[PRINTF_COND_:.+]] = sv.macro.ref.expr @PRINTF_COND_() : () -> i1
// CHECK-NEXT: [[AND:%.+]] = comb.and bin %[[PRINTF_COND_]], %reset : i1
// CHECK-NEXT: sv.if [[AND]] {
// CHECK-NEXT: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32
// CHECK-NEXT: sv.fwrite %PRINTF_FD_, "Decimal: %d %0d %4d\0A"([[ADD]], %b, [[ADD]]) : i5, i4, i5
// CHECK-NEXT: %[[STDERR:.+]] = hw.constant -2147483646 : i32
// CHECK-NEXT: sv.fwrite %[[STDERR]], "Decimal: %d %0d %4d\0A"([[ADD]], %b, [[ADD]]) : i5, i4, i5
// CHECK-NEXT: }
// CHECK-NEXT: %[[PRINTF_COND_:.+]] = sv.macro.ref.expr @PRINTF_COND_() : () -> i1
// CHECK-NEXT: [[AND:%.+]] = comb.and bin %[[PRINTF_COND_]], %reset : i1
// CHECK-NEXT: sv.if [[AND]] {
// CHECK-NEXT: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32
// CHECK-NEXT: sv.fwrite %PRINTF_FD_, "Hexadecimal: %x %0x %4x\0A"([[ADD]], %b, [[ADD]]) : i5, i4, i5
// CHECK-NEXT: %[[STDERR:.+]] = hw.constant -2147483646 : i32
// CHECK-NEXT: sv.fwrite %[[STDERR]], "Hexadecimal: %x %0x %4x\0A"([[ADD]], %b, [[ADD]]) : i5, i4, i5
// CHECK-NEXT: }
// CHECK-NEXT: %[[PRINTF_COND_:.+]] = sv.macro.ref.expr @PRINTF_COND_() : () -> i1
// CHECK-NEXT: [[AND:%.+]] = comb.and bin %[[PRINTF_COND_]], %reset : i1
// CHECK-NEXT: sv.if [[AND]] {
// CHECK-NEXT: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32
// CHECK-NEXT: sv.fwrite %PRINTF_FD_, "ASCII Character: %c\0A"([[ADD]]) : i5
// CHECK-NEXT: %[[STDERR:.+]] = hw.constant -2147483646 : i32
// CHECK-NEXT: sv.fwrite %[[STDERR]], "ASCII Character: %c\0A"([[ADD]]) : i5
// CHECK-NEXT: }
// CHECK-NEXT: %[[PRINTF_COND_:.+]] = sv.macro.ref.expr @PRINTF_COND_() : () -> i1
// CHECK-NEXT: [[AND:%.+]] = comb.and bin %[[PRINTF_COND_]], %reset : i1
// CHECK-NEXT: sv.if [[AND]] {
// CHECK-NEXT: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32
// CHECK-NEXT: %[[STDERR:.+]] = hw.constant -2147483646 : i32
// CHECK-NEXT: [[SUMSIGNED:%.+]] = sv.system "signed"([[ADDSIGNED]])
// CHECK-NEXT: [[DSIGNED:%.+]] = sv.system "signed"(%d)
// CHECK-NEXT: sv.fwrite %PRINTF_FD_, "Hi signed %d %d\0A"([[SUMSIGNED]], [[DSIGNED]]) : i5, i4
// CHECK-NEXT: sv.fwrite %[[STDERR]], "Hi signed %d %d\0A"([[SUMSIGNED]], [[DSIGNED]]) : i5, i4
// CHECK-NEXT: }
// CHECK-NEXT: %[[PRINTF_COND_:.+]] = sv.macro.ref.expr @PRINTF_COND_() : () -> i1
// CHECK-NEXT: [[AND:%.+]] = comb.and bin %[[PRINTF_COND_]], %reset : i1
// CHECK-NEXT: sv.if [[AND]] {
// CHECK-NEXT: %PRINTF_FD_ = sv.macro.ref.expr @PRINTF_FD_() : () -> i32
// CHECK-NEXT: %[[STDERR:.+]] = hw.constant -2147483646 : i32
// CHECK-NEXT: [[TIME:%.+]] = sv.system.time : i64
// CHECK-NEXT: sv.fwrite %PRINTF_FD_, "[%0t]: %d %m"([[TIME]], %a) : i64, i4
// CHECK-NEXT: sv.fwrite %[[STDERR]], "[%0t]: %d %m"([[TIME]], %a) : i64, i4
// CHECK-NEXT: }
// CEHCK-NEXT: %[[PRINTF_COND_:.+]] = sv.macro.ref.expr @PRINTF_COND_() : () -> i1
// CEHCK-NEXT: %[[AND:%.+]] = comb.and bin %[[PRINTF_COND_]], %reset : i1
Expand Down
2 changes: 1 addition & 1 deletion test/firtool/lower-layers.fir
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -125,7 +125,7 @@ circuit TestHarness:
; CHECK: `ifndef SYNTHESIS
; CHECK: always @(posedge TestHarness.clock) begin
; CHECK: if ((`PRINTF_COND_) & TestHarness.reset)
; CHECK: $fwrite(`PRINTF_FD_, "The last PC was: %x", TestHarness.dut.verification.pc_d_probe);
; CHECK: $fwrite(32'h80000002, "The last PC was: %x", TestHarness.dut.verification.pc_d_probe);
; CHECK: end // always @(posedge)
; CHECK: `endif // not def SYNTHESIS
; CHECK: endmodule
Expand Down
14 changes: 7 additions & 7 deletions test/firtool/print.fir
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -28,22 +28,22 @@ circuit PrintTest:
input a : UInt<8>

; CHECK: if ((`PRINTF_COND_) & cond) begin
; CHECK: $fwrite(`PRINTF_FD_, "binary: %b %0b %8b\n", a, a, a);
; CHECK: $fwrite(32'h80000002, "binary: %b %0b %8b\n", a, a, a);
printf(clock, cond, "binary: %b %0b %8b\n", a, a, a)

; CHECK-NEXT: $fwrite(`PRINTF_FD_, "decimal: %d %0d %3d\n", a, a, a);
; CHECK-NEXT: $fwrite(32'h80000002, "decimal: %d %0d %3d\n", a, a, a);
printf(clock, cond, "decimal: %d %0d %3d\n", a, a, a)

; CHECK-NEXT: $fwrite(`PRINTF_FD_, "hexadecimal: %x %0x %2x\n", a, a, a);
; CHECK-NEXT: $fwrite(32'h80000002, "hexadecimal: %x %0x %2x\n", a, a, a);
printf(clock, cond, "hexadecimal: %x %0x %2x\n", a, a, a)

; CHECK-NEXT: $fwrite(`PRINTF_FD_, "ASCII character: %c\n", a);
; CHECK-NEXT: $fwrite(32'h80000002, "ASCII character: %c\n", a);
printf(clock, cond, "ASCII character: %c\n", a)

; CHECK-NEXT: $fwrite(`PRINTF_FD_, "literals: %%\n");
; CHECK-NEXT: $fwrite(32'h80000002, "literals: %%\n");
printf(clock, cond, "literals: %%\n")

; CHECK-NEXT: $fwrite(`PRINTF_FD_, "[%0t]: %m\n", $time);
; CHECK-NEXT: $fwrite(32'h80000002, "[%0t]: %m\n", $time);
; CHECK-NEXT: end
printf(clock, cond, "[{{SimulationTime}}]: {{HierarchicalModuleName}}\n")

Expand All @@ -59,7 +59,7 @@ circuit PrintTest:
node c = UInt<8>(97)
fprintf(clock, cond, "{{HierarchicalModuleName}}%c.txt", c, "[{{SimulationTime}}]: static file name (w/ substitution)\n")

; CHECK-NEXT: $fflush(`PRINTF_FD_);
; CHECK-NEXT: $fflush(32'h80000002);
; CHECK-NEXT: ___circt_lib_logging3A3AFileDescriptor3A3Aget_0 = __circt_lib_logging::FileDescriptor::get($sformatf("%0t%d.txt",
; CHECK-NEXT: $time,
; CHECK-NEXT: a));
Expand Down